Commit c4362c37 authored by Andrew Lunn's avatar Andrew Lunn Committed by David S. Miller
Browse files

net: dsa: mv88e6060: Replace REG_WRITE macro 



The REG_WRITE macro contains a return statement, making it not very
safe. Remove it by inlining the code.

Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3e8bc1b8

drivers/net/dsa/mv88e6060.c

+41 −32
Original line number Original line Diff line number Diff line
@@ -35,15 +35,6 @@ static int reg_write(struct mv88e6060_priv *priv, int addr, int reg, u16 val) 
	return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val);

	return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val);

}

}





#define REG_WRITE(addr, reg, val)				\

	({							\

		int __ret;					\

								\

		__ret = reg_write(priv, addr, reg, val);		\

		if (__ret < 0)					\

			return __ret;				\

	})



static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)

static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)

{

{

	int ret;

	int ret;
@@ -98,17 +89,21 @@ static int mv88e6060_switch_reset(struct mv88e6060_priv *priv) 
	/* Set all ports to the disabled state. */

	/* Set all ports to the disabled state. */

	for (i = 0; i < MV88E6060_PORTS; i++) {

	for (i = 0; i < MV88E6060_PORTS; i++) {

		ret = REG_READ(REG_PORT(i), PORT_CONTROL);

		ret = REG_READ(REG_PORT(i), PORT_CONTROL);

		REG_WRITE(REG_PORT(i), PORT_CONTROL,

		ret = reg_write(priv, REG_PORT(i), PORT_CONTROL,

				ret & ~PORT_CONTROL_STATE_MASK);

				ret & ~PORT_CONTROL_STATE_MASK);

		if (ret)

			return ret;

	}

	}





	/* Wait for transmit queues to drain. */

	/* Wait for transmit queues to drain. */

	usleep_range(2000, 4000);

	usleep_range(2000, 4000);





	/* Reset the switch. */

	/* Reset the switch. */

	REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,

	ret = reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,

			GLOBAL_ATU_CONTROL_SWRESET |

			GLOBAL_ATU_CONTROL_SWRESET |

			GLOBAL_ATU_CONTROL_LEARNDIS);

			GLOBAL_ATU_CONTROL_LEARNDIS);

	if (ret)

		return ret;





	/* Wait up to one second for reset to complete. */

	/* Wait up to one second for reset to complete. */

	timeout = jiffies + 1 * HZ;

	timeout = jiffies + 1 * HZ;
@@ -127,59 +122,67 @@ static int mv88e6060_switch_reset(struct mv88e6060_priv *priv) 




static int mv88e6060_setup_global(struct mv88e6060_priv *priv)

static int mv88e6060_setup_global(struct mv88e6060_priv *priv)

{

{

	int ret;



	/* Disable discarding of frames with excessive collisions,

	/* Disable discarding of frames with excessive collisions,

	 * set the maximum frame size to 1536 bytes, and mask all

	 * set the maximum frame size to 1536 bytes, and mask all

	 * interrupt sources.

	 * interrupt sources.

	 */

	 */

	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, GLOBAL_CONTROL_MAX_FRAME_1536);

	ret = reg_write(priv, REG_GLOBAL, GLOBAL_CONTROL,

			GLOBAL_CONTROL_MAX_FRAME_1536);

	if (ret)

		return ret;





	/* Disable automatic address learning.

	/* Disable automatic address learning.

	 */

	 */

	REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,

	return reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,

			 GLOBAL_ATU_CONTROL_LEARNDIS);

			 GLOBAL_ATU_CONTROL_LEARNDIS);



	return 0;

}

}





static int mv88e6060_setup_port(struct mv88e6060_priv *priv, int p)

static int mv88e6060_setup_port(struct mv88e6060_priv *priv, int p)

{

{

	int addr = REG_PORT(p);

	int addr = REG_PORT(p);

	int ret;





	/* Do not force flow control, disable Ingress and Egress

	/* Do not force flow control, disable Ingress and Egress

	 * Header tagging, disable VLAN tunneling, and set the port

	 * Header tagging, disable VLAN tunneling, and set the port

	 * state to Forwarding.  Additionally, if this is the CPU

	 * state to Forwarding.  Additionally, if this is the CPU

	 * port, enable Ingress and Egress Trailer tagging mode.

	 * port, enable Ingress and Egress Trailer tagging mode.

	 */

	 */

	REG_WRITE(addr, PORT_CONTROL,

	ret = reg_write(priv, addr, PORT_CONTROL,

			dsa_is_cpu_port(priv->ds, p) ?

			dsa_is_cpu_port(priv->ds, p) ?

			PORT_CONTROL_TRAILER |

			PORT_CONTROL_TRAILER |

			PORT_CONTROL_INGRESS_MODE |

			PORT_CONTROL_INGRESS_MODE |

			PORT_CONTROL_STATE_FORWARDING :

			PORT_CONTROL_STATE_FORWARDING :

			PORT_CONTROL_STATE_FORWARDING);

			PORT_CONTROL_STATE_FORWARDING);

	if (ret)

		return ret;





	/* Port based VLAN map: give each port its own address

	/* Port based VLAN map: give each port its own address

	 * database, allow the CPU port to talk to each of the 'real'

	 * database, allow the CPU port to talk to each of the 'real'

	 * ports, and allow each of the 'real' ports to only talk to

	 * ports, and allow each of the 'real' ports to only talk to

	 * the CPU port.

	 * the CPU port.

	 */

	 */

	REG_WRITE(addr, PORT_VLAN_MAP,

	ret = reg_write(priv, addr, PORT_VLAN_MAP,

			((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) |

			((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) |

		   (dsa_is_cpu_port(priv->ds, p) ? dsa_user_ports(priv->ds) :

			(dsa_is_cpu_port(priv->ds, p) ?

			 dsa_user_ports(priv->ds) :

			 BIT(dsa_to_port(priv->ds, p)->cpu_dp->index)));

			 BIT(dsa_to_port(priv->ds, p)->cpu_dp->index)));

	if (ret)

		return ret;





	/* Port Association Vector: when learning source addresses

	/* Port Association Vector: when learning source addresses

	 * of packets, add the address to the address database using

	 * of packets, add the address to the address database using

	 * a port bitmap that has only the bit for this port set and

	 * a port bitmap that has only the bit for this port set and

	 * the other bits clear.

	 * the other bits clear.

	 */

	 */

	REG_WRITE(addr, PORT_ASSOC_VECTOR, BIT(p));

	return reg_write(priv, addr, PORT_ASSOC_VECTOR, BIT(p));



	return 0;

}

}





static int mv88e6060_setup_addr(struct mv88e6060_priv *priv)

static int mv88e6060_setup_addr(struct mv88e6060_priv *priv)

{

{

	u8 addr[ETH_ALEN];

	u8 addr[ETH_ALEN];

	int ret;

	u16 val;

	u16 val;





	eth_random_addr(addr);

	eth_random_addr(addr);
@@ -191,11 +194,17 @@ static int mv88e6060_setup_addr(struct mv88e6060_priv *priv) 
	 */

	 */

	val &= 0xfeff;

	val &= 0xfeff;





	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val);

	ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_01, val);

	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]);

	if (ret)

	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]);

		return ret;



	ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_23,

			(addr[2] << 8) | addr[3]);

	if (ret)

		return ret;





	return 0;

	return reg_write(priv, REG_GLOBAL, GLOBAL_MAC_45,

			 (addr[4] << 8) | addr[5]);

}

}





static int mv88e6060_setup(struct dsa_switch *ds)

static int mv88e6060_setup(struct dsa_switch *ds)