Loading arch/arm/mm/alignment.c +2 −3 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ #include <asm/opcodes.h> #include "fault.h" #include "mm.h" /* * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998 Loading Loading @@ -968,9 +969,7 @@ static int __init alignment_init(void) #ifdef CONFIG_CPU_CP15 if (cpu_is_v6_unaligned()) { cr_alignment &= ~CR_A; cr_no_alignment &= ~CR_A; set_cr(cr_alignment); set_cr(__clear_cr(CR_A)); ai_usermode = safe_usermode(ai_usermode, false); } #endif Loading arch/arm/mm/init.c +10 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #include <linux/dma-contiguous.h> #include <linux/sizes.h> #include <asm/cp15.h> #include <asm/mach-types.h> #include <asm/memblock.h> #include <asm/prom.h> Loading @@ -36,6 +37,15 @@ #include "mm.h" #ifdef CONFIG_CPU_CP15_MMU unsigned long __init __clear_cr(unsigned long mask) { cr_no_alignment = cr_no_alignment & ~mask; cr_alignment = cr_alignment & ~mask; return cr_alignment; } #endif static phys_addr_t phys_initrd_start __initdata = 0; static unsigned long phys_initrd_size __initdata = 0; Loading arch/arm/mm/mm.h +4 −0 Original line number Diff line number Diff line Loading @@ -2,6 +2,8 @@ #include <linux/list.h> #include <linux/vmalloc.h> #include <asm/pgtable.h> /* the upper-most page table pointer */ extern pmd_t *top_pmd; Loading Loading @@ -93,3 +95,5 @@ extern phys_addr_t arm_lowmem_limit; void __init bootmem_init(void); void arm_mm_memblock_reserve(void); void dma_contiguous_remap(void); unsigned long __clear_cr(unsigned long mask); arch/arm/mm/mmu.c +4 −6 Original line number Diff line number Diff line Loading @@ -125,6 +125,7 @@ static struct cachepolicy cache_policies[] __initdata = { */ static int __init early_cachepolicy(char *p) { unsigned long cr = get_cr(); int i; for (i = 0; i < ARRAY_SIZE(cache_policies); i++) { Loading @@ -132,8 +133,7 @@ static int __init early_cachepolicy(char *p) if (memcmp(p, cache_policies[i].policy, len) == 0) { cachepolicy = i; cr_alignment &= ~cache_policies[i].cr_mask; cr_no_alignment &= ~cache_policies[i].cr_mask; cr = __clear_cr(cache_policies[i].cr_mask); break; } } Loading @@ -151,7 +151,7 @@ static int __init early_cachepolicy(char *p) cachepolicy = CPOLICY_WRITEBACK; } flush_cache_all(); set_cr(cr_alignment); set_cr(cr); return 0; } early_param("cachepolicy", early_cachepolicy); Loading Loading @@ -188,9 +188,7 @@ early_param("ecc", early_ecc); static int __init noalign_setup(char *__unused) { cr_alignment &= ~CR_A; cr_no_alignment &= ~CR_A; set_cr(cr_alignment); set_cr(__clear_cr(CR_A)); return 1; } __setup("noalign", noalign_setup); Loading Loading
arch/arm/mm/alignment.c +2 −3 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ #include <asm/opcodes.h> #include "fault.h" #include "mm.h" /* * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998 Loading Loading @@ -968,9 +969,7 @@ static int __init alignment_init(void) #ifdef CONFIG_CPU_CP15 if (cpu_is_v6_unaligned()) { cr_alignment &= ~CR_A; cr_no_alignment &= ~CR_A; set_cr(cr_alignment); set_cr(__clear_cr(CR_A)); ai_usermode = safe_usermode(ai_usermode, false); } #endif Loading
arch/arm/mm/init.c +10 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #include <linux/dma-contiguous.h> #include <linux/sizes.h> #include <asm/cp15.h> #include <asm/mach-types.h> #include <asm/memblock.h> #include <asm/prom.h> Loading @@ -36,6 +37,15 @@ #include "mm.h" #ifdef CONFIG_CPU_CP15_MMU unsigned long __init __clear_cr(unsigned long mask) { cr_no_alignment = cr_no_alignment & ~mask; cr_alignment = cr_alignment & ~mask; return cr_alignment; } #endif static phys_addr_t phys_initrd_start __initdata = 0; static unsigned long phys_initrd_size __initdata = 0; Loading
arch/arm/mm/mm.h +4 −0 Original line number Diff line number Diff line Loading @@ -2,6 +2,8 @@ #include <linux/list.h> #include <linux/vmalloc.h> #include <asm/pgtable.h> /* the upper-most page table pointer */ extern pmd_t *top_pmd; Loading Loading @@ -93,3 +95,5 @@ extern phys_addr_t arm_lowmem_limit; void __init bootmem_init(void); void arm_mm_memblock_reserve(void); void dma_contiguous_remap(void); unsigned long __clear_cr(unsigned long mask);
arch/arm/mm/mmu.c +4 −6 Original line number Diff line number Diff line Loading @@ -125,6 +125,7 @@ static struct cachepolicy cache_policies[] __initdata = { */ static int __init early_cachepolicy(char *p) { unsigned long cr = get_cr(); int i; for (i = 0; i < ARRAY_SIZE(cache_policies); i++) { Loading @@ -132,8 +133,7 @@ static int __init early_cachepolicy(char *p) if (memcmp(p, cache_policies[i].policy, len) == 0) { cachepolicy = i; cr_alignment &= ~cache_policies[i].cr_mask; cr_no_alignment &= ~cache_policies[i].cr_mask; cr = __clear_cr(cache_policies[i].cr_mask); break; } } Loading @@ -151,7 +151,7 @@ static int __init early_cachepolicy(char *p) cachepolicy = CPOLICY_WRITEBACK; } flush_cache_all(); set_cr(cr_alignment); set_cr(cr); return 0; } early_param("cachepolicy", early_cachepolicy); Loading Loading @@ -188,9 +188,7 @@ early_param("ecc", early_ecc); static int __init noalign_setup(char *__unused) { cr_alignment &= ~CR_A; cr_no_alignment &= ~CR_A; set_cr(cr_alignment); set_cr(__clear_cr(CR_A)); return 1; } __setup("noalign", noalign_setup); Loading