Commit a6651c98 authored by Feifei Xu's avatar Feifei Xu Committed by Alex Deucher
Browse files

drm/amd/include:cleanup vega10 mp header files. 



Cleanup asic_reg/vega10/MP folder, remove mp_9_0_default.h

Signed-off-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 75199b8c

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

+2 −2
Original line number Diff line number Diff line
@@ -32,8 +32,8 @@ 
#include "psp_v3_1.h"



#include "vega10/soc15ip.h"

#include "vega10/MP/mp_9_0_offset.h"

#include "vega10/MP/mp_9_0_sh_mask.h"

#include "mp/mp_9_0_offset.h"

#include "mp/mp_9_0_sh_mask.h"

#include "vega10/GC/gc_9_0_offset.h"

#include "sdma0/sdma0_4_0_offset.h"

#include "vega10/NBIO/nbio_6_1_offset.h"

drivers/gpu/drm/amd/amdgpu/soc15.c

+2 −2
Original line number Diff line number Diff line
@@ -42,8 +42,8 @@ 
#include "sdma1/sdma1_4_0_offset.h"

#include "hdp/hdp_4_0_offset.h"

#include "hdp/hdp_4_0_sh_mask.h"

#include "vega10/MP/mp_9_0_offset.h"

#include "vega10/MP/mp_9_0_sh_mask.h"

#include "mp/mp_9_0_offset.h"

#include "mp/mp_9_0_sh_mask.h"

#include "vega10/SMUIO/smuio_9_0_offset.h"

#include "vega10/SMUIO/smuio_9_0_sh_mask.h"

drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h

0 → 100644
+375 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2017  Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included

 * in all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS

 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN

 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN

 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

 */

#ifndef _mp_9_0_OFFSET_HEADER

#define _mp_9_0_OFFSET_HEADER







// addressBlock: mp_SmuMp0_SmnDec

// base address:	0x0

#define mmMP0_SMN_C2PMSG_32	0x0060

#define mmMP0_SMN_C2PMSG_32_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_33	0x0061

#define mmMP0_SMN_C2PMSG_33_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_34	0x0062

#define mmMP0_SMN_C2PMSG_34_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_35	0x0063

#define mmMP0_SMN_C2PMSG_35_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_36	0x0064

#define mmMP0_SMN_C2PMSG_36_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_37	0x0065

#define mmMP0_SMN_C2PMSG_37_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_38	0x0066

#define mmMP0_SMN_C2PMSG_38_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_39	0x0067

#define mmMP0_SMN_C2PMSG_39_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_40	0x0068

#define mmMP0_SMN_C2PMSG_40_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_41	0x0069

#define mmMP0_SMN_C2PMSG_41_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_42	0x006a

#define mmMP0_SMN_C2PMSG_42_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_43	0x006b

#define mmMP0_SMN_C2PMSG_43_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_44	0x006c

#define mmMP0_SMN_C2PMSG_44_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_45	0x006d

#define mmMP0_SMN_C2PMSG_45_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_46	0x006e

#define mmMP0_SMN_C2PMSG_46_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_47	0x006f

#define mmMP0_SMN_C2PMSG_47_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_48	0x0070

#define mmMP0_SMN_C2PMSG_48_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_49	0x0071

#define mmMP0_SMN_C2PMSG_49_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_50	0x0072

#define mmMP0_SMN_C2PMSG_50_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_51	0x0073

#define mmMP0_SMN_C2PMSG_51_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_52	0x0074

#define mmMP0_SMN_C2PMSG_52_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_53	0x0075

#define mmMP0_SMN_C2PMSG_53_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_54	0x0076

#define mmMP0_SMN_C2PMSG_54_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_55	0x0077

#define mmMP0_SMN_C2PMSG_55_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_56	0x0078

#define mmMP0_SMN_C2PMSG_56_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_57	0x0079

#define mmMP0_SMN_C2PMSG_57_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_58	0x007a

#define mmMP0_SMN_C2PMSG_58_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_59	0x007b

#define mmMP0_SMN_C2PMSG_59_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_60	0x007c

#define mmMP0_SMN_C2PMSG_60_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_61	0x007d

#define mmMP0_SMN_C2PMSG_61_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_62	0x007e

#define mmMP0_SMN_C2PMSG_62_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_63	0x007f

#define mmMP0_SMN_C2PMSG_63_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_64	0x0080

#define mmMP0_SMN_C2PMSG_64_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_65	0x0081

#define mmMP0_SMN_C2PMSG_65_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_66	0x0082

#define mmMP0_SMN_C2PMSG_66_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_67	0x0083

#define mmMP0_SMN_C2PMSG_67_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_68	0x0084

#define mmMP0_SMN_C2PMSG_68_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_69	0x0085

#define mmMP0_SMN_C2PMSG_69_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_70	0x0086

#define mmMP0_SMN_C2PMSG_70_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_71	0x0087

#define mmMP0_SMN_C2PMSG_71_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_72	0x0088

#define mmMP0_SMN_C2PMSG_72_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_73	0x0089

#define mmMP0_SMN_C2PMSG_73_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_74	0x008a

#define mmMP0_SMN_C2PMSG_74_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_75	0x008b

#define mmMP0_SMN_C2PMSG_75_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_76	0x008c

#define mmMP0_SMN_C2PMSG_76_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_77	0x008d

#define mmMP0_SMN_C2PMSG_77_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_78	0x008e

#define mmMP0_SMN_C2PMSG_78_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_79	0x008f

#define mmMP0_SMN_C2PMSG_79_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_80	0x0090

#define mmMP0_SMN_C2PMSG_80_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_81	0x0091

#define mmMP0_SMN_C2PMSG_81_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_82	0x0092

#define mmMP0_SMN_C2PMSG_82_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_83	0x0093

#define mmMP0_SMN_C2PMSG_83_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_84	0x0094

#define mmMP0_SMN_C2PMSG_84_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_85	0x0095

#define mmMP0_SMN_C2PMSG_85_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_86	0x0096

#define mmMP0_SMN_C2PMSG_86_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_87	0x0097

#define mmMP0_SMN_C2PMSG_87_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_88	0x0098

#define mmMP0_SMN_C2PMSG_88_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_89	0x0099

#define mmMP0_SMN_C2PMSG_89_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_90	0x009a

#define mmMP0_SMN_C2PMSG_90_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_91	0x009b

#define mmMP0_SMN_C2PMSG_91_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_92	0x009c

#define mmMP0_SMN_C2PMSG_92_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_93	0x009d

#define mmMP0_SMN_C2PMSG_93_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_94	0x009e

#define mmMP0_SMN_C2PMSG_94_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_95	0x009f

#define mmMP0_SMN_C2PMSG_95_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_96	0x00a0

#define mmMP0_SMN_C2PMSG_96_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_97	0x00a1

#define mmMP0_SMN_C2PMSG_97_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_98	0x00a2

#define mmMP0_SMN_C2PMSG_98_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_99	0x00a3

#define mmMP0_SMN_C2PMSG_99_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_100	0x00a4

#define mmMP0_SMN_C2PMSG_100_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_101	0x00a5

#define mmMP0_SMN_C2PMSG_101_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_102	0x00a6

#define mmMP0_SMN_C2PMSG_102_BASE_IDX	0

#define mmMP0_SMN_C2PMSG_103	0x00a7

#define mmMP0_SMN_C2PMSG_103_BASE_IDX	0

#define mmMP0_SMN_ACTIVE_FCN_ID	0x00c0

#define mmMP0_SMN_ACTIVE_FCN_ID_BASE_IDX	0

#define mmMP0_SMN_IH_CREDIT	0x00c1

#define mmMP0_SMN_IH_CREDIT_BASE_IDX	0

#define mmMP0_SMN_IH_SW_INT	0x00c2

#define mmMP0_SMN_IH_SW_INT_BASE_IDX	0

#define mmMP0_SMN_IH_SW_INT_CTRL	0x00c3

#define mmMP0_SMN_IH_SW_INT_CTRL_BASE_IDX	0





// addressBlock: mp_SmuMp1_SmnDec

// base address:	0x0

#define mmMP1_SMN_ACP2MP_RESP	0x0240

#define mmMP1_SMN_ACP2MP_RESP_BASE_IDX	0

#define mmMP1_SMN_DC2MP_RESP	0x0241

#define mmMP1_SMN_DC2MP_RESP_BASE_IDX	0

#define mmMP1_SMN_UVD2MP_RESP	0x0242

#define mmMP1_SMN_UVD2MP_RESP_BASE_IDX	0

#define mmMP1_SMN_VCE2MP_RESP	0x0243

#define mmMP1_SMN_VCE2MP_RESP_BASE_IDX	0

#define mmMP1_SMN_RLC2MP_RESP	0x0244

#define mmMP1_SMN_RLC2MP_RESP_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_32	0x0260

#define mmMP1_SMN_C2PMSG_32_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_33	0x0261

#define mmMP1_SMN_C2PMSG_33_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_34	0x0262

#define mmMP1_SMN_C2PMSG_34_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_35	0x0263

#define mmMP1_SMN_C2PMSG_35_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_36	0x0264

#define mmMP1_SMN_C2PMSG_36_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_37	0x0265

#define mmMP1_SMN_C2PMSG_37_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_38	0x0266

#define mmMP1_SMN_C2PMSG_38_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_39	0x0267

#define mmMP1_SMN_C2PMSG_39_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_40	0x0268

#define mmMP1_SMN_C2PMSG_40_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_41	0x0269

#define mmMP1_SMN_C2PMSG_41_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_42	0x026a

#define mmMP1_SMN_C2PMSG_42_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_43	0x026b

#define mmMP1_SMN_C2PMSG_43_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_44	0x026c

#define mmMP1_SMN_C2PMSG_44_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_45	0x026d

#define mmMP1_SMN_C2PMSG_45_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_46	0x026e

#define mmMP1_SMN_C2PMSG_46_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_47	0x026f

#define mmMP1_SMN_C2PMSG_47_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_48	0x0270

#define mmMP1_SMN_C2PMSG_48_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_49	0x0271

#define mmMP1_SMN_C2PMSG_49_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_50	0x0272

#define mmMP1_SMN_C2PMSG_50_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_51	0x0273

#define mmMP1_SMN_C2PMSG_51_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_52	0x0274

#define mmMP1_SMN_C2PMSG_52_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_53	0x0275

#define mmMP1_SMN_C2PMSG_53_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_54	0x0276

#define mmMP1_SMN_C2PMSG_54_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_55	0x0277

#define mmMP1_SMN_C2PMSG_55_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_56	0x0278

#define mmMP1_SMN_C2PMSG_56_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_57	0x0279

#define mmMP1_SMN_C2PMSG_57_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_58	0x027a

#define mmMP1_SMN_C2PMSG_58_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_59	0x027b

#define mmMP1_SMN_C2PMSG_59_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_60	0x027c

#define mmMP1_SMN_C2PMSG_60_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_61	0x027d

#define mmMP1_SMN_C2PMSG_61_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_62	0x027e

#define mmMP1_SMN_C2PMSG_62_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_63	0x027f

#define mmMP1_SMN_C2PMSG_63_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_64	0x0280

#define mmMP1_SMN_C2PMSG_64_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_65	0x0281

#define mmMP1_SMN_C2PMSG_65_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_66	0x0282

#define mmMP1_SMN_C2PMSG_66_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_67	0x0283

#define mmMP1_SMN_C2PMSG_67_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_68	0x0284

#define mmMP1_SMN_C2PMSG_68_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_69	0x0285

#define mmMP1_SMN_C2PMSG_69_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_70	0x0286

#define mmMP1_SMN_C2PMSG_70_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_71	0x0287

#define mmMP1_SMN_C2PMSG_71_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_72	0x0288

#define mmMP1_SMN_C2PMSG_72_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_73	0x0289

#define mmMP1_SMN_C2PMSG_73_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_74	0x028a

#define mmMP1_SMN_C2PMSG_74_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_75	0x028b

#define mmMP1_SMN_C2PMSG_75_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_76	0x028c

#define mmMP1_SMN_C2PMSG_76_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_77	0x028d

#define mmMP1_SMN_C2PMSG_77_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_78	0x028e

#define mmMP1_SMN_C2PMSG_78_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_79	0x028f

#define mmMP1_SMN_C2PMSG_79_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_80	0x0290

#define mmMP1_SMN_C2PMSG_80_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_81	0x0291

#define mmMP1_SMN_C2PMSG_81_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_82	0x0292

#define mmMP1_SMN_C2PMSG_82_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_83	0x0293

#define mmMP1_SMN_C2PMSG_83_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_84	0x0294

#define mmMP1_SMN_C2PMSG_84_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_85	0x0295

#define mmMP1_SMN_C2PMSG_85_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_86	0x0296

#define mmMP1_SMN_C2PMSG_86_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_87	0x0297

#define mmMP1_SMN_C2PMSG_87_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_88	0x0298

#define mmMP1_SMN_C2PMSG_88_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_89	0x0299

#define mmMP1_SMN_C2PMSG_89_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_90	0x029a

#define mmMP1_SMN_C2PMSG_90_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_91	0x029b

#define mmMP1_SMN_C2PMSG_91_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_92	0x029c

#define mmMP1_SMN_C2PMSG_92_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_93	0x029d

#define mmMP1_SMN_C2PMSG_93_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_94	0x029e

#define mmMP1_SMN_C2PMSG_94_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_95	0x029f

#define mmMP1_SMN_C2PMSG_95_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_96	0x02a0

#define mmMP1_SMN_C2PMSG_96_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_97	0x02a1

#define mmMP1_SMN_C2PMSG_97_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_98	0x02a2

#define mmMP1_SMN_C2PMSG_98_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_99	0x02a3

#define mmMP1_SMN_C2PMSG_99_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_100	0x02a4

#define mmMP1_SMN_C2PMSG_100_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_101	0x02a5

#define mmMP1_SMN_C2PMSG_101_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_102	0x02a6

#define mmMP1_SMN_C2PMSG_102_BASE_IDX	0

#define mmMP1_SMN_C2PMSG_103	0x02a7

#define mmMP1_SMN_C2PMSG_103_BASE_IDX	0

#define mmMP1_SMN_ACTIVE_FCN_ID	0x02c0

#define mmMP1_SMN_ACTIVE_FCN_ID_BASE_IDX	0

#define mmMP1_SMN_IH_CREDIT	0x02c1

#define mmMP1_SMN_IH_CREDIT_BASE_IDX	0

#define mmMP1_SMN_IH_SW_INT	0x02c2

#define mmMP1_SMN_IH_SW_INT_BASE_IDX	0

#define mmMP1_SMN_IH_SW_INT_CTRL	0x02c3

#define mmMP1_SMN_IH_SW_INT_CTRL_BASE_IDX	0

#define mmMP1_SMN_FPS_CNT	0x02c4

#define mmMP1_SMN_FPS_CNT_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH0	0x03c0

#define mmMP1_SMN_EXT_SCRATCH0_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH1	0x03c1

#define mmMP1_SMN_EXT_SCRATCH1_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH2	0x03c2

#define mmMP1_SMN_EXT_SCRATCH2_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH3	0x03c3

#define mmMP1_SMN_EXT_SCRATCH3_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH4	0x03c4

#define mmMP1_SMN_EXT_SCRATCH4_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH5	0x03c5

#define mmMP1_SMN_EXT_SCRATCH5_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH6	0x03c6

#define mmMP1_SMN_EXT_SCRATCH6_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH7	0x03c7

#define mmMP1_SMN_EXT_SCRATCH7_BASE_IDX	0

#define mmMP1_SMN_EXT_SCRATCH8	0x03c8

#define mmMP1_SMN_EXT_SCRATCH8_BASE_IDX	0





// addressBlock: mp_SmuMp1Pub_CruDec

// base address:	0x0

#define mmMP1_SMN_PUB_CTRL	0x02c5

#define mmMP1_SMN_PUB_CTRL_BASE_IDX	0







#endif

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drivers/gpu/drm/amd/include/asic_reg/vega10/MP/mp_9_0_default.h

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