Commit a4b76193 authored by Pierre Ossman's avatar Pierre Ossman
Browse files

sdhci: force high speed capability on some controllers 



Some high speed capable controllers forget to set the high speed
capability bit. Make sure we enable the functionality anyway.

Signed-off-by: default avatarPierre Ossman <drzeus@drzeus.cx>
parent d6d8de33

drivers/mmc/host/sdhci-pci.c

+2 −1
Original line number Diff line number Diff line
@@ -144,7 +144,8 @@ static int jmicron_probe(struct sdhci_pci_chip *chip) 
			  SDHCI_QUIRK_32BIT_DMA_SIZE |

			  SDHCI_QUIRK_32BIT_ADMA_SIZE |

			  SDHCI_QUIRK_RESET_AFTER_REQUEST |

			  SDHCI_QUIRK_BROKEN_SMALL_PIO;

			  SDHCI_QUIRK_BROKEN_SMALL_PIO |

			  SDHCI_QUIRK_FORCE_HIGHSPEED;

	}



	/*

drivers/mmc/host/sdhci.c

+2 −1
Original line number Diff line number Diff line
@@ -1631,7 +1631,8 @@ int sdhci_add_host(struct sdhci_host *host) 
	mmc->f_max = host->max_clk;

	mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;



	if (caps & SDHCI_CAN_DO_HISPD)

	if ((caps & SDHCI_CAN_DO_HISPD) ||

		(host->quirks & SDHCI_QUIRK_FORCE_HIGHSPEED))

		mmc->caps |= MMC_CAP_SD_HIGHSPEED;



	mmc->ocr_avail = 0;

drivers/mmc/host/sdhci.h

+2 −0
Original line number Diff line number Diff line
@@ -208,6 +208,8 @@ struct sdhci_host { 
#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL			(1<<12)

/* Controller has an issue with buffer bits for small transfers */

#define SDHCI_QUIRK_BROKEN_SMALL_PIO			(1<<13)

/* Controller supports high speed but doesn't have the caps bit set */

#define SDHCI_QUIRK_FORCE_HIGHSPEED			(1<<14)



	int			irq;		/* Device IRQ */

	void __iomem *		ioaddr;		/* Mapped address */