ASoC: wm8741: Fix setting BCLK and LRCLK polarity
After checking the code and the datasheet, it seems like we are handling the clock inversion (SND_SOC_DAIFMT_NB_IF and SND_SOC_DAIFMT_IB_IF) not correctly. >From the datasheet (Table 58): R5 Format Control, BITS[5:4], [BCP:LRP]: (0) 00 = normal BCLK, normal LRCLK (1) 01 = normal BCLK, inverted LRCLK <-- Fix this (2) 10 = inverted BCLK, normal LRCLK (3) 11 = inverted BCLK, inverted LRCLK <-- Fix this Signed-off-by:Sergej Sawazki <sergej@taudac.com> Acked-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by:
Mark Brown <broonie@kernel.org>
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