Loading arch/sparc/include/asm/leon.h +1 −1 Original line number Diff line number Diff line Loading @@ -197,7 +197,7 @@ static inline int sparc_leon3_cpuid(void) #ifndef __ASSEMBLY__ struct vm_area_struct; extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr); extern unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr); extern void leon_flush_icache_all(void); extern void leon_flush_dcache_all(void); extern void leon_flush_cache_all(void); Loading arch/sparc/include/asm/pgtsrmmu.h +0 −17 Original line number Diff line number Diff line Loading @@ -166,23 +166,6 @@ static inline void srmmu_flush_whole_tlb(void) } /* These flush types are not available on all chips... */ #ifndef CONFIG_SPARC_LEON static inline unsigned long srmmu_hwprobe(unsigned long vaddr) { unsigned long retval; vaddr &= PAGE_MASK; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (retval) : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); return retval; } #else #define srmmu_hwprobe(addr) srmmu_swprobe(addr, 0) #endif static inline int srmmu_get_pte (unsigned long addr) { Loading arch/sparc/mm/leon_mm.c +1 −1 Original line number Diff line number Diff line Loading @@ -32,7 +32,7 @@ static inline unsigned long leon_get_ctable_ptr(void) } unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr) unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr) { unsigned int ctxtbl; Loading arch/sparc/mm/srmmu.c +21 −4 Original line number Diff line number Diff line Loading @@ -646,6 +646,23 @@ static void __init srmmu_allocate_ptable_skeleton(unsigned long start, } } /* These flush types are not available on all chips... */ static inline unsigned long srmmu_probe(unsigned long vaddr) { unsigned long retval; if (sparc_cpu_model != sparc_leon) { vaddr &= PAGE_MASK; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (retval) : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); } else { retval = leon_swprobe(vaddr, 0); } return retval; } /* * This is much cleaner than poking around physical address space * looking at the prom's page table directly which is what most Loading @@ -665,7 +682,7 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start, break; /* probably wrap around */ if(start == 0xfef00000) start = KADB_DEBUGGER_BEGVM; if(!(prompte = srmmu_hwprobe(start))) { if(!(prompte = srmmu_probe(start))) { start += PAGE_SIZE; continue; } Loading @@ -674,12 +691,12 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start, what = 0; if(!(start & ~(SRMMU_REAL_PMD_MASK))) { if(srmmu_hwprobe((start-PAGE_SIZE) + SRMMU_REAL_PMD_SIZE) == prompte) if(srmmu_probe((start-PAGE_SIZE) + SRMMU_REAL_PMD_SIZE) == prompte) what = 1; } if(!(start & ~(SRMMU_PGDIR_MASK))) { if(srmmu_hwprobe((start-PAGE_SIZE) + SRMMU_PGDIR_SIZE) == if(srmmu_probe((start-PAGE_SIZE) + SRMMU_PGDIR_SIZE) == prompte) what = 2; } Loading Loading @@ -1156,7 +1173,7 @@ static void turbosparc_flush_page_to_ram(unsigned long page) #ifdef TURBOSPARC_WRITEBACK volatile unsigned long clear; if (srmmu_hwprobe(page)) if (srmmu_probe(page)) turbosparc_flush_page_cache(page); clear = srmmu_get_fstatus(); #endif Loading Loading
arch/sparc/include/asm/leon.h +1 −1 Original line number Diff line number Diff line Loading @@ -197,7 +197,7 @@ static inline int sparc_leon3_cpuid(void) #ifndef __ASSEMBLY__ struct vm_area_struct; extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr); extern unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr); extern void leon_flush_icache_all(void); extern void leon_flush_dcache_all(void); extern void leon_flush_cache_all(void); Loading
arch/sparc/include/asm/pgtsrmmu.h +0 −17 Original line number Diff line number Diff line Loading @@ -166,23 +166,6 @@ static inline void srmmu_flush_whole_tlb(void) } /* These flush types are not available on all chips... */ #ifndef CONFIG_SPARC_LEON static inline unsigned long srmmu_hwprobe(unsigned long vaddr) { unsigned long retval; vaddr &= PAGE_MASK; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (retval) : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); return retval; } #else #define srmmu_hwprobe(addr) srmmu_swprobe(addr, 0) #endif static inline int srmmu_get_pte (unsigned long addr) { Loading
arch/sparc/mm/leon_mm.c +1 −1 Original line number Diff line number Diff line Loading @@ -32,7 +32,7 @@ static inline unsigned long leon_get_ctable_ptr(void) } unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr) unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr) { unsigned int ctxtbl; Loading
arch/sparc/mm/srmmu.c +21 −4 Original line number Diff line number Diff line Loading @@ -646,6 +646,23 @@ static void __init srmmu_allocate_ptable_skeleton(unsigned long start, } } /* These flush types are not available on all chips... */ static inline unsigned long srmmu_probe(unsigned long vaddr) { unsigned long retval; if (sparc_cpu_model != sparc_leon) { vaddr &= PAGE_MASK; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r" (retval) : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); } else { retval = leon_swprobe(vaddr, 0); } return retval; } /* * This is much cleaner than poking around physical address space * looking at the prom's page table directly which is what most Loading @@ -665,7 +682,7 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start, break; /* probably wrap around */ if(start == 0xfef00000) start = KADB_DEBUGGER_BEGVM; if(!(prompte = srmmu_hwprobe(start))) { if(!(prompte = srmmu_probe(start))) { start += PAGE_SIZE; continue; } Loading @@ -674,12 +691,12 @@ static void __init srmmu_inherit_prom_mappings(unsigned long start, what = 0; if(!(start & ~(SRMMU_REAL_PMD_MASK))) { if(srmmu_hwprobe((start-PAGE_SIZE) + SRMMU_REAL_PMD_SIZE) == prompte) if(srmmu_probe((start-PAGE_SIZE) + SRMMU_REAL_PMD_SIZE) == prompte) what = 1; } if(!(start & ~(SRMMU_PGDIR_MASK))) { if(srmmu_hwprobe((start-PAGE_SIZE) + SRMMU_PGDIR_SIZE) == if(srmmu_probe((start-PAGE_SIZE) + SRMMU_PGDIR_SIZE) == prompte) what = 2; } Loading Loading @@ -1156,7 +1173,7 @@ static void turbosparc_flush_page_to_ram(unsigned long page) #ifdef TURBOSPARC_WRITEBACK volatile unsigned long clear; if (srmmu_hwprobe(page)) if (srmmu_probe(page)) turbosparc_flush_page_cache(page); clear = srmmu_get_fstatus(); #endif Loading