Loading sound/pci/oxygen/hifier.c +31 −15 Original line number Diff line number Diff line Loading @@ -57,23 +57,28 @@ static struct pci_device_id hifier_ids[] __devinitdata = { MODULE_DEVICE_TABLE(pci, hifier_ids); struct hifier_data { u8 ak4396_ctl2; u8 ak4396_regs[5]; }; static void ak4396_write(struct oxygen *chip, u8 reg, u8 value) { struct hifier_data *data = chip->model_data; oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | OXYGEN_SPI_DATA_LENGTH_2 | OXYGEN_SPI_CLOCK_160 | (0 << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, AK4396_WRITE | (reg << 8) | value); data->ak4396_regs[reg] = value; } static void update_ak4396_volume(struct oxygen *chip) static void ak4396_write_cached(struct oxygen *chip, u8 reg, u8 value) { ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]); ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]); struct hifier_data *data = chip->model_data; if (value != data->ak4396_regs[reg]) ak4396_write(chip, reg, value); } static void hifier_registers_init(struct oxygen *chip) Loading @@ -81,16 +86,19 @@ static void hifier_registers_init(struct oxygen *chip) struct hifier_data *data = chip->model_data; ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, AK4396_CONTROL_2, data->ak4396_ctl2); ak4396_write(chip, AK4396_CONTROL_2, data->ak4396_regs[AK4396_CONTROL_2]); ak4396_write(chip, AK4396_CONTROL_3, AK4396_PCM); update_ak4396_volume(chip); ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]); ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]); } static void hifier_init(struct oxygen *chip) { struct hifier_data *data = chip->model_data; data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; data->ak4396_regs[AK4396_CONTROL_2] = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; hifier_registers_init(chip); snd_component_add(chip->card, "AK4396"); Loading @@ -112,20 +120,29 @@ static void set_ak4396_params(struct oxygen *chip, struct hifier_data *data = chip->model_data; u8 value; value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_DFS_MASK; if (params_rate(params) <= 54000) value |= AK4396_DFS_NORMAL; else if (params_rate(params) <= 108000) value |= AK4396_DFS_DOUBLE; else value |= AK4396_DFS_QUAD; data->ak4396_ctl2 = value; msleep(1); /* wait for the new MCLK to become stable */ ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB); if (value != data->ak4396_regs[AK4396_CONTROL_2]) { ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB); ak4396_write(chip, AK4396_CONTROL_2, value); ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); } } static void update_ak4396_volume(struct oxygen *chip) { ak4396_write_cached(chip, AK4396_LCH_ATT, chip->dac_volume[0]); ak4396_write_cached(chip, AK4396_RCH_ATT, chip->dac_volume[1]); } static void update_ak4396_mute(struct oxygen *chip) Loading @@ -133,11 +150,10 @@ static void update_ak4396_mute(struct oxygen *chip) struct hifier_data *data = chip->model_data; u8 value; value = data->ak4396_ctl2 & ~AK4396_SMUTE; value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_SMUTE; if (chip->dac_mute) value |= AK4396_SMUTE; data->ak4396_ctl2 = value; ak4396_write(chip, AK4396_CONTROL_2, value); ak4396_write_cached(chip, AK4396_CONTROL_2, value); } static void set_cs5340_params(struct oxygen *chip, Loading sound/pci/oxygen/oxygen.c +58 −49 Original line number Diff line number Diff line Loading @@ -97,8 +97,8 @@ MODULE_DEVICE_TABLE(pci, oxygen_ids); #define GPIO_CLARO_HP 0x0100 struct generic_data { u8 ak4396_ctl2; u16 saved_wm8785_registers[2]; u8 ak4396_regs[4][5]; u16 wm8785_regs[1]; }; static void ak4396_write(struct oxygen *chip, unsigned int codec, Loading @@ -108,12 +108,24 @@ static void ak4396_write(struct oxygen *chip, unsigned int codec, static const u8 codec_spi_map[4] = { 0, 1, 2, 4 }; struct generic_data *data = chip->model_data; oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | OXYGEN_SPI_DATA_LENGTH_2 | OXYGEN_SPI_CLOCK_160 | (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, AK4396_WRITE | (reg << 8) | value); data->ak4396_regs[codec][reg] = value; } static void ak4396_write_cached(struct oxygen *chip, unsigned int codec, u8 reg, u8 value) { struct generic_data *data = chip->model_data; if (value != data->ak4396_regs[codec][reg]) ak4396_write(chip, codec, reg, value); } static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) Loading @@ -126,20 +138,8 @@ static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) (3 << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_LO, (reg << 9) | value); if (reg < ARRAY_SIZE(data->saved_wm8785_registers)) data->saved_wm8785_registers[reg] = value; } static void update_ak4396_volume(struct oxygen *chip) { unsigned int i; for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_LCH_ATT, chip->dac_volume[i * 2]); ak4396_write(chip, i, AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); } if (reg < ARRAY_SIZE(data->wm8785_regs)) data->wm8785_regs[reg] = value; } static void ak4396_registers_init(struct oxygen *chip) Loading @@ -148,21 +148,25 @@ static void ak4396_registers_init(struct oxygen *chip) unsigned int i; for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, i, AK4396_CONTROL_2, data->ak4396_ctl2); ak4396_write(chip, i, AK4396_CONTROL_3, AK4396_PCM); ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, i, AK4396_CONTROL_2, data->ak4396_regs[0][AK4396_CONTROL_2]); ak4396_write(chip, i, AK4396_CONTROL_3, AK4396_PCM); ak4396_write(chip, i, AK4396_LCH_ATT, chip->dac_volume[i * 2]); ak4396_write(chip, i, AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); } update_ak4396_volume(chip); } static void ak4396_init(struct oxygen *chip) { struct generic_data *data = chip->model_data; data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; data->ak4396_regs[0][AK4396_CONTROL_2] = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; ak4396_registers_init(chip); snd_component_add(chip->card, "AK4396"); } Loading @@ -179,17 +183,15 @@ static void wm8785_registers_init(struct oxygen *chip) struct generic_data *data = chip->model_data; wm8785_write(chip, WM8785_R7, 0); wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]); wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]); wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]); } static void wm8785_init(struct oxygen *chip) { struct generic_data *data = chip->model_data; data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST; data->saved_wm8785_registers[1] = WM8785_WL_24; data->wm8785_regs[0] = WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST; wm8785_registers_init(chip); snd_component_add(chip->card, "WM8785"); } Loading Loading @@ -270,24 +272,36 @@ static void set_ak4396_params(struct oxygen *chip, unsigned int i; u8 value; value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK; if (params_rate(params) <= 54000) value |= AK4396_DFS_NORMAL; else if (params_rate(params) <= 108000) value |= AK4396_DFS_DOUBLE; else value |= AK4396_DFS_QUAD; data->ak4396_ctl2 = value; msleep(1); /* wait for the new MCLK to become stable */ if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) { for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB); ak4396_write(chip, i, AK4396_CONTROL_2, value); ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); } } } static void update_ak4396_volume(struct oxygen *chip) { unsigned int i; for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB); ak4396_write(chip, i, AK4396_CONTROL_2, value); ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write_cached(chip, i, AK4396_LCH_ATT, chip->dac_volume[i * 2]); ak4396_write_cached(chip, i, AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); } } Loading @@ -297,21 +311,19 @@ static void update_ak4396_mute(struct oxygen *chip) unsigned int i; u8 value; value = data->ak4396_ctl2 & ~AK4396_SMUTE; value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE; if (chip->dac_mute) value |= AK4396_SMUTE; data->ak4396_ctl2 = value; for (i = 0; i < 4; ++i) ak4396_write(chip, i, AK4396_CONTROL_2, value); ak4396_write_cached(chip, i, AK4396_CONTROL_2, value); } static void set_wm8785_params(struct oxygen *chip, struct snd_pcm_hw_params *params) { struct generic_data *data = chip->model_data; unsigned int value; wm8785_write(chip, WM8785_R7, 0); value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST; if (params_rate(params) <= 48000) value |= WM8785_OSR_SINGLE; Loading @@ -319,13 +331,10 @@ static void set_wm8785_params(struct oxygen *chip, value |= WM8785_OSR_DOUBLE; else value |= WM8785_OSR_QUAD; if (value != data->wm8785_regs[0]) { wm8785_write(chip, WM8785_R7, 0); wm8785_write(chip, WM8785_R0, value); if (snd_pcm_format_width(params_format(params)) <= 16) value = WM8785_WL_16; else value = WM8785_WL_24; wm8785_write(chip, WM8785_R1, value); } } static void set_ak5385_params(struct oxygen *chip, Loading sound/pci/oxygen/xonar_cs43xx.c +87 −53 Original line number Diff line number Diff line Loading @@ -69,62 +69,58 @@ struct xonar_cs43xx { struct xonar_generic generic; u8 cs4398_fm; u8 cs4362a_fm; u8 cs4362a_fm_c; u8 cs4398_regs[7]; u8 cs4362a_regs[15]; }; static void cs4398_write(struct oxygen *chip, u8 reg, u8 value) { oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); } struct xonar_cs43xx *data = chip->model_data; static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) { oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); if (reg < ARRAY_SIZE(data->cs4398_regs)) data->cs4398_regs[reg] = value; } static void update_cs4362a_volumes(struct oxygen *chip) static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value) { u8 mute; struct xonar_cs43xx *data = chip->model_data; mute = chip->dac_mute ? CS4362A_MUTE : 0; cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute); cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute); cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute); cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute); cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute); cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute); if (value != data->cs4398_regs[reg]) cs4398_write(chip, reg, value); } static void update_cs43xx_volume(struct oxygen *chip) static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) { cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2); cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2); update_cs4362a_volumes(chip); struct xonar_cs43xx *data = chip->model_data; oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); if (reg < ARRAY_SIZE(data->cs4362a_regs)) data->cs4362a_regs[reg] = value; } static void update_cs43xx_mute(struct oxygen *chip) static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value) { u8 reg; struct xonar_cs43xx *data = chip->model_data; reg = CS4398_MUTEP_LOW | CS4398_PAMUTE; if (chip->dac_mute) reg |= CS4398_MUTE_B | CS4398_MUTE_A; cs4398_write(chip, 4, reg); update_cs4362a_volumes(chip); if (value != data->cs4362a_regs[reg]) cs4362a_write(chip, reg, value); } static void cs43xx_init(struct oxygen *chip) static void cs43xx_registers_init(struct oxygen *chip) { struct xonar_cs43xx *data = chip->model_data; unsigned int i; /* set CPEN (control port mode) and power down */ cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN); cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); /* configure */ cs4398_write(chip, 2, data->cs4398_fm); cs4398_write(chip, 2, data->cs4398_regs[2]); cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L); cs4398_write(chip, 4, data->cs4398_regs[4]); cs4398_write(chip, 5, data->cs4398_regs[5]); cs4398_write(chip, 6, data->cs4398_regs[6]); cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP | CS4398_ZERO_CROSS | CS4398_SOFT_RAMP); cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST); Loading @@ -132,11 +128,8 @@ static void cs43xx_init(struct oxygen *chip) CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP); cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE); cs4362a_write(chip, 0x05, 0); cs4362a_write(chip, 0x06, data->cs4362a_fm); cs4362a_write(chip, 0x09, data->cs4362a_fm_c); cs4362a_write(chip, 0x0c, data->cs4362a_fm); update_cs43xx_volume(chip); update_cs43xx_mute(chip); for (i = 6; i <= 14; ++i) cs4362a_write(chip, i, data->cs4362a_regs[i]); /* clear power down */ cs4398_write(chip, 8, CS4398_CPEN); cs4362a_write(chip, 0x01, CS4362A_CPEN); Loading @@ -148,17 +141,29 @@ static void xonar_d1_init(struct oxygen *chip) data->generic.anti_pop_delay = 800; data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE; data->cs4398_fm = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST; data->cs4362a_fm = CS4362A_FM_SINGLE | data->cs4398_regs[2] = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST; data->cs4398_regs[4] = CS4398_MUTEP_LOW | CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE; data->cs4398_regs[5] = 60 * 2; data->cs4398_regs[6] = 60 * 2; data->cs4362a_regs[6] = CS4362A_FM_SINGLE | CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; data->cs4362a_fm_c = data->cs4362a_fm; data->cs4362a_regs[7] = 60 | CS4362A_MUTE; data->cs4362a_regs[8] = 60 | CS4362A_MUTE; data->cs4362a_regs[9] = data->cs4362a_regs[6]; data->cs4362a_regs[10] = 60 | CS4362A_MUTE; data->cs4362a_regs[11] = 60 | CS4362A_MUTE; data->cs4362a_regs[12] = data->cs4362a_regs[6]; data->cs4362a_regs[13] = 60 | CS4362A_MUTE; data->cs4362a_regs[14] = 60 | CS4362A_MUTE; oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, OXYGEN_2WIRE_LENGTH_8 | OXYGEN_2WIRE_INTERRUPT_MASK | OXYGEN_2WIRE_SPEED_FAST); cs43xx_init(chip); cs43xx_registers_init(chip); oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE); Loading Loading @@ -200,7 +205,7 @@ static void xonar_d1_resume(struct oxygen *chip) { oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); msleep(1); cs43xx_init(chip); cs43xx_registers_init(chip); xonar_enable_output(chip); } Loading @@ -220,27 +225,56 @@ static void set_cs43xx_params(struct oxygen *chip, cs4398_fm = CS4398_FM_QUAD; cs4362a_fm = CS4362A_FM_QUAD; } data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST | cs4398_fm; data->cs4362a_fm = (data->cs4362a_fm & ~CS4362A_FM_MASK) | cs4362a_fm; data->cs4362a_fm_c = (data->cs4362a_fm_c & ~CS4362A_FM_MASK) | cs4362a_fm; cs4398_write(chip, 2, data->cs4398_fm); cs4362a_write(chip, 0x06, data->cs4362a_fm); cs4362a_write(chip, 0x09, data->cs4362a_fm_c); cs4362a_write(chip, 0x0c, data->cs4362a_fm); cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST; cs4398_write_cached(chip, 2, cs4398_fm); cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK; cs4362a_write_cached(chip, 6, cs4362a_fm); cs4362a_write_cached(chip, 12, cs4362a_fm); cs4362a_fm &= CS4362A_FM_MASK; cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK; cs4362a_write_cached(chip, 9, cs4362a_fm); } static void update_cs4362a_volumes(struct oxygen *chip) { unsigned int i; u8 mute; mute = chip->dac_mute ? CS4362A_MUTE : 0; for (i = 0; i < 6; ++i) cs4362a_write_cached(chip, 7 + i + i / 2, (127 - chip->dac_volume[2 + i]) | mute); } static void update_cs43xx_volume(struct oxygen *chip) { cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2); cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2); update_cs4362a_volumes(chip); } static void update_cs43xx_mute(struct oxygen *chip) { u8 reg; reg = CS4398_MUTEP_LOW | CS4398_PAMUTE; if (chip->dac_mute) reg |= CS4398_MUTE_B | CS4398_MUTE_A; cs4398_write_cached(chip, 4, reg); update_cs4362a_volumes(chip); } static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed) { struct xonar_cs43xx *data = chip->model_data; u8 reg; data->cs4362a_fm_c &= ~CS4362A_ATAPI_MASK; reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK; if (mixed) data->cs4362a_fm_c |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR; reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR; else data->cs4362a_fm_c |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; cs4362a_write(chip, 0x09, data->cs4362a_fm_c); reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; cs4362a_write_cached(chip, 9, reg); } static const struct snd_kcontrol_new front_panel_switch = { Loading sound/pci/oxygen/xonar_pcm179x.c +74 −35 Original line number Diff line number Diff line Loading @@ -166,11 +166,13 @@ #define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ii, /W=0 */ #define I2C_DEVICE_CS2000 0x9c /* 100111, 0, /W=0 */ #define PCM1796_REG_BASE 16 struct xonar_pcm179x { struct xonar_generic generic; unsigned int dacs; u8 oversampling; u8 pcm1796_regs[4][5]; u8 cs2000_fun_cfg_1; }; Loading Loading @@ -204,54 +206,71 @@ static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec, static void pcm1796_write(struct oxygen *chip, unsigned int codec, u8 reg, u8 value) { struct xonar_pcm179x *data = chip->model_data; if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) == OXYGEN_FUNCTION_SPI) pcm1796_write_spi(chip, codec, reg, value); else pcm1796_write_i2c(chip, codec, reg, value); if ((unsigned int)(reg - PCM1796_REG_BASE) < ARRAY_SIZE(data->pcm1796_regs[codec])) data->pcm1796_regs[codec][reg - PCM1796_REG_BASE] = value; } static void cs2000_write(struct oxygen *chip, u8 reg, u8 value) static void pcm1796_write_cached(struct oxygen *chip, unsigned int codec, u8 reg, u8 value) { oxygen_write_i2c(chip, I2C_DEVICE_CS2000, reg, value); struct xonar_pcm179x *data = chip->model_data; if (value != data->pcm1796_regs[codec][reg - PCM1796_REG_BASE]) pcm1796_write(chip, codec, reg, value); } static void update_pcm1796_volume(struct oxygen *chip) static void cs2000_write(struct oxygen *chip, u8 reg, u8 value) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; for (i = 0; i < data->dacs; ++i) { pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]); pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]); } oxygen_write_i2c(chip, I2C_DEVICE_CS2000, reg, value); if (reg == CS2000_FUN_CFG_1) data->cs2000_fun_cfg_1 = value; } static void update_pcm1796_mute(struct oxygen *chip) static void cs2000_write_cached(struct oxygen *chip, u8 reg, u8 value) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; u8 value; value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD; if (chip->dac_mute) value |= PCM1796_MUTE; for (i = 0; i < data->dacs; ++i) pcm1796_write(chip, i, 18, value); if (reg != CS2000_FUN_CFG_1 || value != data->cs2000_fun_cfg_1) cs2000_write(chip, reg, value); } static void pcm1796_init(struct oxygen *chip) static void pcm1796_registers_init(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; for (i = 0; i < data->dacs; ++i) { /* set ATLD before ATL/ATR */ pcm1796_write(chip, i, 18, data->pcm1796_regs[0][18 - PCM1796_REG_BASE]); pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]); pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]); pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1); pcm1796_write(chip, i, 20, data->oversampling); pcm1796_write(chip, i, 20, data->pcm1796_regs[0][20 - PCM1796_REG_BASE]); pcm1796_write(chip, i, 21, 0); } update_pcm1796_mute(chip); /* set ATLD before ATL/ATR */ update_pcm1796_volume(chip); } static void pcm1796_init(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; data->pcm1796_regs[0][18 - PCM1796_REG_BASE] = PCM1796_MUTE | PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD; data->pcm1796_regs[0][20 - PCM1796_REG_BASE] = PCM1796_OS_64; pcm1796_registers_init(chip); } static void xonar_d2_init(struct oxygen *chip) Loading @@ -261,7 +280,6 @@ static void xonar_d2_init(struct oxygen *chip) data->generic.anti_pop_delay = 300; data->generic.output_enable_bit = GPIO_D2_OUTPUT_ENABLE; data->dacs = 4; data->oversampling = PCM1796_OS_64; pcm1796_init(chip); Loading Loading @@ -304,7 +322,6 @@ static void xonar_hdav_init(struct oxygen *chip) data->pcm179x.generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; data->pcm179x.generic.ext_power_bit = GPI_EXT_POWER; data->pcm179x.dacs = chip->model.private_data ? 4 : 1; data->pcm179x.oversampling = PCM1796_OS_64; pcm1796_init(chip); Loading Loading @@ -335,7 +352,6 @@ static void xonar_st_init_common(struct oxygen *chip) data->generic.anti_pop_delay = 100; data->generic.output_enable_bit = GPIO_ST_OUTPUT_ENABLE; data->dacs = chip->model.private_data ? 4 : 1; data->oversampling = PCM1796_OS_64; pcm1796_init(chip); Loading Loading @@ -438,7 +454,7 @@ static void xonar_st_suspend(struct oxygen *chip) static void xonar_d2_resume(struct oxygen *chip) { pcm1796_init(chip); pcm1796_registers_init(chip); xonar_enable_output(chip); } Loading @@ -446,14 +462,14 @@ static void xonar_hdav_resume(struct oxygen *chip) { struct xonar_hdav *data = chip->model_data; pcm1796_init(chip); pcm1796_registers_init(chip); xonar_hdmi_resume(chip, &data->hdmi); xonar_enable_output(chip); } static void xonar_stx_resume(struct oxygen *chip) { pcm1796_init(chip); pcm1796_registers_init(chip); xonar_enable_output(chip); } Loading @@ -468,11 +484,35 @@ static void set_pcm1796_params(struct oxygen *chip, { struct xonar_pcm179x *data = chip->model_data; unsigned int i; u8 reg; data->oversampling = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64; reg = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64; for (i = 0; i < data->dacs; ++i) pcm1796_write(chip, i, 20, data->oversampling); pcm1796_write_cached(chip, i, 20, reg); } static void update_pcm1796_volume(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; for (i = 0; i < data->dacs; ++i) { pcm1796_write_cached(chip, i, 16, chip->dac_volume[i * 2]); pcm1796_write_cached(chip, i, 17, chip->dac_volume[i * 2 + 1]); } } static void update_pcm1796_mute(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; u8 value; value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD; if (chip->dac_mute) value |= PCM1796_MUTE; for (i = 0; i < data->dacs; ++i) pcm1796_write_cached(chip, i, 18, value); } static void set_cs2000_params(struct oxygen *chip, Loading @@ -489,9 +529,8 @@ static void set_cs2000_params(struct oxygen *chip, [OXYGEN_RATE_176400] = OXYGEN_RATE_44100 | OXYGEN_I2S_MCLK_256, [OXYGEN_RATE_192000] = OXYGEN_RATE_48000 | OXYGEN_I2S_MCLK_256, }; struct xonar_pcm179x *data = chip->model_data; unsigned int rate_index; u8 rate_mclk; u8 rate_mclk, reg; rate_index = oxygen_read16(chip, OXYGEN_I2S_MULTICH_FORMAT) & OXYGEN_I2S_RATE_MASK; Loading @@ -499,10 +538,10 @@ static void set_cs2000_params(struct oxygen *chip, oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, rate_mclk, OXYGEN_I2S_RATE_MASK | OXYGEN_I2S_MCLK_MASK); if ((rate_mclk & OXYGEN_I2S_MCLK_MASK) <= OXYGEN_I2S_MCLK_128) data->cs2000_fun_cfg_1 = CS2000_REF_CLK_DIV_1; reg = CS2000_REF_CLK_DIV_1; else data->cs2000_fun_cfg_1 = CS2000_REF_CLK_DIV_2; cs2000_write(chip, CS2000_FUN_CFG_1, data->cs2000_fun_cfg_1); reg = CS2000_REF_CLK_DIV_2; cs2000_write_cached(chip, CS2000_FUN_CFG_1, reg); } static void set_st_params(struct oxygen *chip, Loading Loading
sound/pci/oxygen/hifier.c +31 −15 Original line number Diff line number Diff line Loading @@ -57,23 +57,28 @@ static struct pci_device_id hifier_ids[] __devinitdata = { MODULE_DEVICE_TABLE(pci, hifier_ids); struct hifier_data { u8 ak4396_ctl2; u8 ak4396_regs[5]; }; static void ak4396_write(struct oxygen *chip, u8 reg, u8 value) { struct hifier_data *data = chip->model_data; oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | OXYGEN_SPI_DATA_LENGTH_2 | OXYGEN_SPI_CLOCK_160 | (0 << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, AK4396_WRITE | (reg << 8) | value); data->ak4396_regs[reg] = value; } static void update_ak4396_volume(struct oxygen *chip) static void ak4396_write_cached(struct oxygen *chip, u8 reg, u8 value) { ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]); ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]); struct hifier_data *data = chip->model_data; if (value != data->ak4396_regs[reg]) ak4396_write(chip, reg, value); } static void hifier_registers_init(struct oxygen *chip) Loading @@ -81,16 +86,19 @@ static void hifier_registers_init(struct oxygen *chip) struct hifier_data *data = chip->model_data; ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, AK4396_CONTROL_2, data->ak4396_ctl2); ak4396_write(chip, AK4396_CONTROL_2, data->ak4396_regs[AK4396_CONTROL_2]); ak4396_write(chip, AK4396_CONTROL_3, AK4396_PCM); update_ak4396_volume(chip); ak4396_write(chip, AK4396_LCH_ATT, chip->dac_volume[0]); ak4396_write(chip, AK4396_RCH_ATT, chip->dac_volume[1]); } static void hifier_init(struct oxygen *chip) { struct hifier_data *data = chip->model_data; data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; data->ak4396_regs[AK4396_CONTROL_2] = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; hifier_registers_init(chip); snd_component_add(chip->card, "AK4396"); Loading @@ -112,20 +120,29 @@ static void set_ak4396_params(struct oxygen *chip, struct hifier_data *data = chip->model_data; u8 value; value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_DFS_MASK; if (params_rate(params) <= 54000) value |= AK4396_DFS_NORMAL; else if (params_rate(params) <= 108000) value |= AK4396_DFS_DOUBLE; else value |= AK4396_DFS_QUAD; data->ak4396_ctl2 = value; msleep(1); /* wait for the new MCLK to become stable */ ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB); if (value != data->ak4396_regs[AK4396_CONTROL_2]) { ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB); ak4396_write(chip, AK4396_CONTROL_2, value); ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); } } static void update_ak4396_volume(struct oxygen *chip) { ak4396_write_cached(chip, AK4396_LCH_ATT, chip->dac_volume[0]); ak4396_write_cached(chip, AK4396_RCH_ATT, chip->dac_volume[1]); } static void update_ak4396_mute(struct oxygen *chip) Loading @@ -133,11 +150,10 @@ static void update_ak4396_mute(struct oxygen *chip) struct hifier_data *data = chip->model_data; u8 value; value = data->ak4396_ctl2 & ~AK4396_SMUTE; value = data->ak4396_regs[AK4396_CONTROL_2] & ~AK4396_SMUTE; if (chip->dac_mute) value |= AK4396_SMUTE; data->ak4396_ctl2 = value; ak4396_write(chip, AK4396_CONTROL_2, value); ak4396_write_cached(chip, AK4396_CONTROL_2, value); } static void set_cs5340_params(struct oxygen *chip, Loading
sound/pci/oxygen/oxygen.c +58 −49 Original line number Diff line number Diff line Loading @@ -97,8 +97,8 @@ MODULE_DEVICE_TABLE(pci, oxygen_ids); #define GPIO_CLARO_HP 0x0100 struct generic_data { u8 ak4396_ctl2; u16 saved_wm8785_registers[2]; u8 ak4396_regs[4][5]; u16 wm8785_regs[1]; }; static void ak4396_write(struct oxygen *chip, unsigned int codec, Loading @@ -108,12 +108,24 @@ static void ak4396_write(struct oxygen *chip, unsigned int codec, static const u8 codec_spi_map[4] = { 0, 1, 2, 4 }; struct generic_data *data = chip->model_data; oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER | OXYGEN_SPI_DATA_LENGTH_2 | OXYGEN_SPI_CLOCK_160 | (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_HI, AK4396_WRITE | (reg << 8) | value); data->ak4396_regs[codec][reg] = value; } static void ak4396_write_cached(struct oxygen *chip, unsigned int codec, u8 reg, u8 value) { struct generic_data *data = chip->model_data; if (value != data->ak4396_regs[codec][reg]) ak4396_write(chip, codec, reg, value); } static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) Loading @@ -126,20 +138,8 @@ static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value) (3 << OXYGEN_SPI_CODEC_SHIFT) | OXYGEN_SPI_CEN_LATCH_CLOCK_LO, (reg << 9) | value); if (reg < ARRAY_SIZE(data->saved_wm8785_registers)) data->saved_wm8785_registers[reg] = value; } static void update_ak4396_volume(struct oxygen *chip) { unsigned int i; for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_LCH_ATT, chip->dac_volume[i * 2]); ak4396_write(chip, i, AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); } if (reg < ARRAY_SIZE(data->wm8785_regs)) data->wm8785_regs[reg] = value; } static void ak4396_registers_init(struct oxygen *chip) Loading @@ -148,21 +148,25 @@ static void ak4396_registers_init(struct oxygen *chip) unsigned int i; for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, i, AK4396_CONTROL_2, data->ak4396_ctl2); ak4396_write(chip, i, AK4396_CONTROL_3, AK4396_PCM); ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write(chip, i, AK4396_CONTROL_2, data->ak4396_regs[0][AK4396_CONTROL_2]); ak4396_write(chip, i, AK4396_CONTROL_3, AK4396_PCM); ak4396_write(chip, i, AK4396_LCH_ATT, chip->dac_volume[i * 2]); ak4396_write(chip, i, AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); } update_ak4396_volume(chip); } static void ak4396_init(struct oxygen *chip) { struct generic_data *data = chip->model_data; data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; data->ak4396_regs[0][AK4396_CONTROL_2] = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL; ak4396_registers_init(chip); snd_component_add(chip->card, "AK4396"); } Loading @@ -179,17 +183,15 @@ static void wm8785_registers_init(struct oxygen *chip) struct generic_data *data = chip->model_data; wm8785_write(chip, WM8785_R7, 0); wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]); wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]); wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]); } static void wm8785_init(struct oxygen *chip) { struct generic_data *data = chip->model_data; data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST; data->saved_wm8785_registers[1] = WM8785_WL_24; data->wm8785_regs[0] = WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST; wm8785_registers_init(chip); snd_component_add(chip->card, "WM8785"); } Loading Loading @@ -270,24 +272,36 @@ static void set_ak4396_params(struct oxygen *chip, unsigned int i; u8 value; value = data->ak4396_ctl2 & ~AK4396_DFS_MASK; value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK; if (params_rate(params) <= 54000) value |= AK4396_DFS_NORMAL; else if (params_rate(params) <= 108000) value |= AK4396_DFS_DOUBLE; else value |= AK4396_DFS_QUAD; data->ak4396_ctl2 = value; msleep(1); /* wait for the new MCLK to become stable */ if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) { for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB); ak4396_write(chip, i, AK4396_CONTROL_2, value); ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); } } } static void update_ak4396_volume(struct oxygen *chip) { unsigned int i; for (i = 0; i < 4; ++i) { ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB); ak4396_write(chip, i, AK4396_CONTROL_2, value); ak4396_write(chip, i, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN); ak4396_write_cached(chip, i, AK4396_LCH_ATT, chip->dac_volume[i * 2]); ak4396_write_cached(chip, i, AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]); } } Loading @@ -297,21 +311,19 @@ static void update_ak4396_mute(struct oxygen *chip) unsigned int i; u8 value; value = data->ak4396_ctl2 & ~AK4396_SMUTE; value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE; if (chip->dac_mute) value |= AK4396_SMUTE; data->ak4396_ctl2 = value; for (i = 0; i < 4; ++i) ak4396_write(chip, i, AK4396_CONTROL_2, value); ak4396_write_cached(chip, i, AK4396_CONTROL_2, value); } static void set_wm8785_params(struct oxygen *chip, struct snd_pcm_hw_params *params) { struct generic_data *data = chip->model_data; unsigned int value; wm8785_write(chip, WM8785_R7, 0); value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST; if (params_rate(params) <= 48000) value |= WM8785_OSR_SINGLE; Loading @@ -319,13 +331,10 @@ static void set_wm8785_params(struct oxygen *chip, value |= WM8785_OSR_DOUBLE; else value |= WM8785_OSR_QUAD; if (value != data->wm8785_regs[0]) { wm8785_write(chip, WM8785_R7, 0); wm8785_write(chip, WM8785_R0, value); if (snd_pcm_format_width(params_format(params)) <= 16) value = WM8785_WL_16; else value = WM8785_WL_24; wm8785_write(chip, WM8785_R1, value); } } static void set_ak5385_params(struct oxygen *chip, Loading
sound/pci/oxygen/xonar_cs43xx.c +87 −53 Original line number Diff line number Diff line Loading @@ -69,62 +69,58 @@ struct xonar_cs43xx { struct xonar_generic generic; u8 cs4398_fm; u8 cs4362a_fm; u8 cs4362a_fm_c; u8 cs4398_regs[7]; u8 cs4362a_regs[15]; }; static void cs4398_write(struct oxygen *chip, u8 reg, u8 value) { oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); } struct xonar_cs43xx *data = chip->model_data; static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) { oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value); if (reg < ARRAY_SIZE(data->cs4398_regs)) data->cs4398_regs[reg] = value; } static void update_cs4362a_volumes(struct oxygen *chip) static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value) { u8 mute; struct xonar_cs43xx *data = chip->model_data; mute = chip->dac_mute ? CS4362A_MUTE : 0; cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute); cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute); cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute); cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute); cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute); cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute); if (value != data->cs4398_regs[reg]) cs4398_write(chip, reg, value); } static void update_cs43xx_volume(struct oxygen *chip) static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value) { cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2); cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2); update_cs4362a_volumes(chip); struct xonar_cs43xx *data = chip->model_data; oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value); if (reg < ARRAY_SIZE(data->cs4362a_regs)) data->cs4362a_regs[reg] = value; } static void update_cs43xx_mute(struct oxygen *chip) static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value) { u8 reg; struct xonar_cs43xx *data = chip->model_data; reg = CS4398_MUTEP_LOW | CS4398_PAMUTE; if (chip->dac_mute) reg |= CS4398_MUTE_B | CS4398_MUTE_A; cs4398_write(chip, 4, reg); update_cs4362a_volumes(chip); if (value != data->cs4362a_regs[reg]) cs4362a_write(chip, reg, value); } static void cs43xx_init(struct oxygen *chip) static void cs43xx_registers_init(struct oxygen *chip) { struct xonar_cs43xx *data = chip->model_data; unsigned int i; /* set CPEN (control port mode) and power down */ cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN); cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN); /* configure */ cs4398_write(chip, 2, data->cs4398_fm); cs4398_write(chip, 2, data->cs4398_regs[2]); cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L); cs4398_write(chip, 4, data->cs4398_regs[4]); cs4398_write(chip, 5, data->cs4398_regs[5]); cs4398_write(chip, 6, data->cs4398_regs[6]); cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP | CS4398_ZERO_CROSS | CS4398_SOFT_RAMP); cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST); Loading @@ -132,11 +128,8 @@ static void cs43xx_init(struct oxygen *chip) CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP); cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE); cs4362a_write(chip, 0x05, 0); cs4362a_write(chip, 0x06, data->cs4362a_fm); cs4362a_write(chip, 0x09, data->cs4362a_fm_c); cs4362a_write(chip, 0x0c, data->cs4362a_fm); update_cs43xx_volume(chip); update_cs43xx_mute(chip); for (i = 6; i <= 14; ++i) cs4362a_write(chip, i, data->cs4362a_regs[i]); /* clear power down */ cs4398_write(chip, 8, CS4398_CPEN); cs4362a_write(chip, 0x01, CS4362A_CPEN); Loading @@ -148,17 +141,29 @@ static void xonar_d1_init(struct oxygen *chip) data->generic.anti_pop_delay = 800; data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE; data->cs4398_fm = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST; data->cs4362a_fm = CS4362A_FM_SINGLE | data->cs4398_regs[2] = CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST; data->cs4398_regs[4] = CS4398_MUTEP_LOW | CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE; data->cs4398_regs[5] = 60 * 2; data->cs4398_regs[6] = 60 * 2; data->cs4362a_regs[6] = CS4362A_FM_SINGLE | CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; data->cs4362a_fm_c = data->cs4362a_fm; data->cs4362a_regs[7] = 60 | CS4362A_MUTE; data->cs4362a_regs[8] = 60 | CS4362A_MUTE; data->cs4362a_regs[9] = data->cs4362a_regs[6]; data->cs4362a_regs[10] = 60 | CS4362A_MUTE; data->cs4362a_regs[11] = 60 | CS4362A_MUTE; data->cs4362a_regs[12] = data->cs4362a_regs[6]; data->cs4362a_regs[13] = 60 | CS4362A_MUTE; data->cs4362a_regs[14] = 60 | CS4362A_MUTE; oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS, OXYGEN_2WIRE_LENGTH_8 | OXYGEN_2WIRE_INTERRUPT_MASK | OXYGEN_2WIRE_SPEED_FAST); cs43xx_init(chip); cs43xx_registers_init(chip); oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE); Loading Loading @@ -200,7 +205,7 @@ static void xonar_d1_resume(struct oxygen *chip) { oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); msleep(1); cs43xx_init(chip); cs43xx_registers_init(chip); xonar_enable_output(chip); } Loading @@ -220,27 +225,56 @@ static void set_cs43xx_params(struct oxygen *chip, cs4398_fm = CS4398_FM_QUAD; cs4362a_fm = CS4362A_FM_QUAD; } data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST | cs4398_fm; data->cs4362a_fm = (data->cs4362a_fm & ~CS4362A_FM_MASK) | cs4362a_fm; data->cs4362a_fm_c = (data->cs4362a_fm_c & ~CS4362A_FM_MASK) | cs4362a_fm; cs4398_write(chip, 2, data->cs4398_fm); cs4362a_write(chip, 0x06, data->cs4362a_fm); cs4362a_write(chip, 0x09, data->cs4362a_fm_c); cs4362a_write(chip, 0x0c, data->cs4362a_fm); cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST; cs4398_write_cached(chip, 2, cs4398_fm); cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK; cs4362a_write_cached(chip, 6, cs4362a_fm); cs4362a_write_cached(chip, 12, cs4362a_fm); cs4362a_fm &= CS4362A_FM_MASK; cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK; cs4362a_write_cached(chip, 9, cs4362a_fm); } static void update_cs4362a_volumes(struct oxygen *chip) { unsigned int i; u8 mute; mute = chip->dac_mute ? CS4362A_MUTE : 0; for (i = 0; i < 6; ++i) cs4362a_write_cached(chip, 7 + i + i / 2, (127 - chip->dac_volume[2 + i]) | mute); } static void update_cs43xx_volume(struct oxygen *chip) { cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2); cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2); update_cs4362a_volumes(chip); } static void update_cs43xx_mute(struct oxygen *chip) { u8 reg; reg = CS4398_MUTEP_LOW | CS4398_PAMUTE; if (chip->dac_mute) reg |= CS4398_MUTE_B | CS4398_MUTE_A; cs4398_write_cached(chip, 4, reg); update_cs4362a_volumes(chip); } static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed) { struct xonar_cs43xx *data = chip->model_data; u8 reg; data->cs4362a_fm_c &= ~CS4362A_ATAPI_MASK; reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK; if (mixed) data->cs4362a_fm_c |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR; reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR; else data->cs4362a_fm_c |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; cs4362a_write(chip, 0x09, data->cs4362a_fm_c); reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L; cs4362a_write_cached(chip, 9, reg); } static const struct snd_kcontrol_new front_panel_switch = { Loading
sound/pci/oxygen/xonar_pcm179x.c +74 −35 Original line number Diff line number Diff line Loading @@ -166,11 +166,13 @@ #define I2C_DEVICE_PCM1796(i) (0x98 + ((i) << 1)) /* 10011, ii, /W=0 */ #define I2C_DEVICE_CS2000 0x9c /* 100111, 0, /W=0 */ #define PCM1796_REG_BASE 16 struct xonar_pcm179x { struct xonar_generic generic; unsigned int dacs; u8 oversampling; u8 pcm1796_regs[4][5]; u8 cs2000_fun_cfg_1; }; Loading Loading @@ -204,54 +206,71 @@ static inline void pcm1796_write_i2c(struct oxygen *chip, unsigned int codec, static void pcm1796_write(struct oxygen *chip, unsigned int codec, u8 reg, u8 value) { struct xonar_pcm179x *data = chip->model_data; if ((chip->model.function_flags & OXYGEN_FUNCTION_2WIRE_SPI_MASK) == OXYGEN_FUNCTION_SPI) pcm1796_write_spi(chip, codec, reg, value); else pcm1796_write_i2c(chip, codec, reg, value); if ((unsigned int)(reg - PCM1796_REG_BASE) < ARRAY_SIZE(data->pcm1796_regs[codec])) data->pcm1796_regs[codec][reg - PCM1796_REG_BASE] = value; } static void cs2000_write(struct oxygen *chip, u8 reg, u8 value) static void pcm1796_write_cached(struct oxygen *chip, unsigned int codec, u8 reg, u8 value) { oxygen_write_i2c(chip, I2C_DEVICE_CS2000, reg, value); struct xonar_pcm179x *data = chip->model_data; if (value != data->pcm1796_regs[codec][reg - PCM1796_REG_BASE]) pcm1796_write(chip, codec, reg, value); } static void update_pcm1796_volume(struct oxygen *chip) static void cs2000_write(struct oxygen *chip, u8 reg, u8 value) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; for (i = 0; i < data->dacs; ++i) { pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]); pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]); } oxygen_write_i2c(chip, I2C_DEVICE_CS2000, reg, value); if (reg == CS2000_FUN_CFG_1) data->cs2000_fun_cfg_1 = value; } static void update_pcm1796_mute(struct oxygen *chip) static void cs2000_write_cached(struct oxygen *chip, u8 reg, u8 value) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; u8 value; value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD; if (chip->dac_mute) value |= PCM1796_MUTE; for (i = 0; i < data->dacs; ++i) pcm1796_write(chip, i, 18, value); if (reg != CS2000_FUN_CFG_1 || value != data->cs2000_fun_cfg_1) cs2000_write(chip, reg, value); } static void pcm1796_init(struct oxygen *chip) static void pcm1796_registers_init(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; for (i = 0; i < data->dacs; ++i) { /* set ATLD before ATL/ATR */ pcm1796_write(chip, i, 18, data->pcm1796_regs[0][18 - PCM1796_REG_BASE]); pcm1796_write(chip, i, 16, chip->dac_volume[i * 2]); pcm1796_write(chip, i, 17, chip->dac_volume[i * 2 + 1]); pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1); pcm1796_write(chip, i, 20, data->oversampling); pcm1796_write(chip, i, 20, data->pcm1796_regs[0][20 - PCM1796_REG_BASE]); pcm1796_write(chip, i, 21, 0); } update_pcm1796_mute(chip); /* set ATLD before ATL/ATR */ update_pcm1796_volume(chip); } static void pcm1796_init(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; data->pcm1796_regs[0][18 - PCM1796_REG_BASE] = PCM1796_MUTE | PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD; data->pcm1796_regs[0][20 - PCM1796_REG_BASE] = PCM1796_OS_64; pcm1796_registers_init(chip); } static void xonar_d2_init(struct oxygen *chip) Loading @@ -261,7 +280,6 @@ static void xonar_d2_init(struct oxygen *chip) data->generic.anti_pop_delay = 300; data->generic.output_enable_bit = GPIO_D2_OUTPUT_ENABLE; data->dacs = 4; data->oversampling = PCM1796_OS_64; pcm1796_init(chip); Loading Loading @@ -304,7 +322,6 @@ static void xonar_hdav_init(struct oxygen *chip) data->pcm179x.generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK; data->pcm179x.generic.ext_power_bit = GPI_EXT_POWER; data->pcm179x.dacs = chip->model.private_data ? 4 : 1; data->pcm179x.oversampling = PCM1796_OS_64; pcm1796_init(chip); Loading Loading @@ -335,7 +352,6 @@ static void xonar_st_init_common(struct oxygen *chip) data->generic.anti_pop_delay = 100; data->generic.output_enable_bit = GPIO_ST_OUTPUT_ENABLE; data->dacs = chip->model.private_data ? 4 : 1; data->oversampling = PCM1796_OS_64; pcm1796_init(chip); Loading Loading @@ -438,7 +454,7 @@ static void xonar_st_suspend(struct oxygen *chip) static void xonar_d2_resume(struct oxygen *chip) { pcm1796_init(chip); pcm1796_registers_init(chip); xonar_enable_output(chip); } Loading @@ -446,14 +462,14 @@ static void xonar_hdav_resume(struct oxygen *chip) { struct xonar_hdav *data = chip->model_data; pcm1796_init(chip); pcm1796_registers_init(chip); xonar_hdmi_resume(chip, &data->hdmi); xonar_enable_output(chip); } static void xonar_stx_resume(struct oxygen *chip) { pcm1796_init(chip); pcm1796_registers_init(chip); xonar_enable_output(chip); } Loading @@ -468,11 +484,35 @@ static void set_pcm1796_params(struct oxygen *chip, { struct xonar_pcm179x *data = chip->model_data; unsigned int i; u8 reg; data->oversampling = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64; reg = params_rate(params) >= 96000 ? PCM1796_OS_32 : PCM1796_OS_64; for (i = 0; i < data->dacs; ++i) pcm1796_write(chip, i, 20, data->oversampling); pcm1796_write_cached(chip, i, 20, reg); } static void update_pcm1796_volume(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; for (i = 0; i < data->dacs; ++i) { pcm1796_write_cached(chip, i, 16, chip->dac_volume[i * 2]); pcm1796_write_cached(chip, i, 17, chip->dac_volume[i * 2 + 1]); } } static void update_pcm1796_mute(struct oxygen *chip) { struct xonar_pcm179x *data = chip->model_data; unsigned int i; u8 value; value = PCM1796_DMF_DISABLED | PCM1796_FMT_24_LJUST | PCM1796_ATLD; if (chip->dac_mute) value |= PCM1796_MUTE; for (i = 0; i < data->dacs; ++i) pcm1796_write_cached(chip, i, 18, value); } static void set_cs2000_params(struct oxygen *chip, Loading @@ -489,9 +529,8 @@ static void set_cs2000_params(struct oxygen *chip, [OXYGEN_RATE_176400] = OXYGEN_RATE_44100 | OXYGEN_I2S_MCLK_256, [OXYGEN_RATE_192000] = OXYGEN_RATE_48000 | OXYGEN_I2S_MCLK_256, }; struct xonar_pcm179x *data = chip->model_data; unsigned int rate_index; u8 rate_mclk; u8 rate_mclk, reg; rate_index = oxygen_read16(chip, OXYGEN_I2S_MULTICH_FORMAT) & OXYGEN_I2S_RATE_MASK; Loading @@ -499,10 +538,10 @@ static void set_cs2000_params(struct oxygen *chip, oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT, rate_mclk, OXYGEN_I2S_RATE_MASK | OXYGEN_I2S_MCLK_MASK); if ((rate_mclk & OXYGEN_I2S_MCLK_MASK) <= OXYGEN_I2S_MCLK_128) data->cs2000_fun_cfg_1 = CS2000_REF_CLK_DIV_1; reg = CS2000_REF_CLK_DIV_1; else data->cs2000_fun_cfg_1 = CS2000_REF_CLK_DIV_2; cs2000_write(chip, CS2000_FUN_CFG_1, data->cs2000_fun_cfg_1); reg = CS2000_REF_CLK_DIV_2; cs2000_write_cached(chip, CS2000_FUN_CFG_1, reg); } static void set_st_params(struct oxygen *chip, Loading