Loading drivers/staging/vme/bridges/vme_ca91cx42.c +9 −9 Original line number Diff line number Diff line Loading @@ -338,7 +338,7 @@ static int ca91cx42_irq_generate(struct vme_bridge *ca91cx42_bridge, int level, static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) dma_addr_t pci_base, u32 aspace, u32 cycle) { unsigned int i, addr = 0, granularity; unsigned int temp_ctl = 0; Loading Loading @@ -444,7 +444,7 @@ static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, static int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *pci_base, vme_address_t *aspace, vme_cycle_t *cycle) dma_addr_t *pci_base, u32 *aspace, u32 *cycle) { unsigned int i, granularity = 0, ctl = 0; unsigned long long vme_bound, pci_offset; Loading Loading @@ -595,8 +595,8 @@ static void ca91cx42_free_resource(struct vme_master_resource *image) static int ca91cx42_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) { int retval = 0; unsigned int i, granularity = 0; Loading Loading @@ -753,7 +753,7 @@ err_window: static int __ca91cx42_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) u32 *aspace, u32 *cycle, u32 *dwidth) { unsigned int i, ctl; unsigned long long pci_base, pci_bound, vme_offset; Loading Loading @@ -839,8 +839,8 @@ static int __ca91cx42_master_get(struct vme_master_resource *image, } static int ca91cx42_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { int retval; Loading Loading @@ -1292,7 +1292,7 @@ static int ca91cx42_dma_list_empty(struct vme_dma_list *list) * callback is attached and disabled when the last callback is removed. */ static int ca91cx42_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, vme_address_t aspace, vme_cycle_t cycle) unsigned long long lm_base, u32 aspace, u32 cycle) { u32 temp_base, lm_ctl = 0; int i; Loading Loading @@ -1360,7 +1360,7 @@ static int ca91cx42_lm_set(struct vme_lm_resource *lm, * or disabled. */ static int ca91cx42_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) unsigned long long *lm_base, u32 *aspace, u32 *cycle) { u32 lm_ctl, enabled = 0; struct ca91cx42_driver *bridge; Loading drivers/staging/vme/bridges/vme_tsi148.c +16 −20 Original line number Diff line number Diff line Loading @@ -483,7 +483,7 @@ static int tsi148_irq_generate(struct vme_bridge *tsi148_bridge, int level, * Find the first error in this address range */ static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge, vme_address_t aspace, unsigned long long address, size_t count) u32 aspace, unsigned long long address, size_t count) { struct list_head *err_pos; struct vme_bus_error *vme_err, *valid = NULL; Loading Loading @@ -517,7 +517,7 @@ static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge, * Clear errors in the provided address range. */ static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge, vme_address_t aspace, unsigned long long address, size_t count) u32 aspace, unsigned long long address, size_t count) { struct list_head *err_pos, *temp; struct vme_bus_error *vme_err; Loading Loading @@ -551,7 +551,7 @@ static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge, */ static int tsi148_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) dma_addr_t pci_base, u32 aspace, u32 cycle) { unsigned int i, addr = 0, granularity = 0; unsigned int temp_ctl = 0; Loading Loading @@ -701,7 +701,7 @@ static int tsi148_slave_set(struct vme_slave_resource *image, int enabled, */ static int tsi148_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *pci_base, vme_address_t *aspace, vme_cycle_t *cycle) dma_addr_t *pci_base, u32 *aspace, u32 *cycle) { unsigned int i, granularity = 0, ctl = 0; unsigned int vme_base_low, vme_base_high; Loading Loading @@ -893,8 +893,8 @@ static void tsi148_free_resource(struct vme_master_resource *image) * Set the attributes of an outbound window. */ static int tsi148_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) { int retval = 0; unsigned int i; Loading Loading @@ -1129,8 +1129,8 @@ err_window: * XXX Not parsing prefetch information. */ static int __tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { unsigned int i, ctl; unsigned int pci_base_low, pci_base_high; Loading Loading @@ -1239,8 +1239,8 @@ static int __tsi148_master_get(struct vme_master_resource *image, int *enabled, static int tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { int retval; Loading @@ -1259,9 +1259,7 @@ static ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf, { int retval, enabled; unsigned long long vme_base, size; vme_address_t aspace; vme_cycle_t cycle; vme_width_t dwidth; u32 aspace, cycle, dwidth; struct vme_bus_error *vme_err = NULL; struct vme_bridge *tsi148_bridge; Loading Loading @@ -1301,9 +1299,7 @@ static ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, { int retval = 0, enabled; unsigned long long vme_base, size; vme_address_t aspace; vme_cycle_t cycle; vme_width_t dwidth; u32 aspace, cycle, dwidth; struct vme_bus_error *vme_err = NULL; struct vme_bridge *tsi148_bridge; Loading Loading @@ -1420,7 +1416,7 @@ static unsigned int tsi148_master_rmw(struct vme_master_resource *image, } static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) u32 aspace, u32 cycle, u32 dwidth) { /* Setup 2eSST speeds */ switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { Loading Loading @@ -1514,7 +1510,7 @@ static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr, } static int tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) u32 aspace, u32 cycle, u32 dwidth) { /* Setup 2eSST speeds */ switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { Loading Loading @@ -1886,7 +1882,7 @@ static int tsi148_dma_list_empty(struct vme_dma_list *list) * callback is attached and disabled when the last callback is removed. */ static int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, vme_address_t aspace, vme_cycle_t cycle) u32 aspace, u32 cycle) { u32 lm_base_high, lm_base_low, lm_ctl = 0; int i; Loading Loading @@ -1953,7 +1949,7 @@ static int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, * or disabled. */ static int tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) unsigned long long *lm_base, u32 *aspace, u32 *cycle) { u32 lm_base_high, lm_base_low, lm_ctl, enabled = 0; struct tsi148_driver *bridge; Loading drivers/staging/vme/devices/vme_user.h +5 −5 Original line number Diff line number Diff line Loading @@ -10,9 +10,9 @@ struct vme_master { int enable; /* State of Window */ unsigned long long vme_addr; /* Starting Address on the VMEbus */ unsigned long long size; /* Window Size */ vme_address_t aspace; /* Address Space */ vme_cycle_t cycle; /* Cycle properties */ vme_width_t dwidth; /* Maximum Data Width */ u32 aspace; /* Address Space */ u32 cycle; /* Cycle properties */ u32 dwidth; /* Maximum Data Width */ #if 0 char prefetchEnable; /* Prefetch Read Enable State */ int prefetchSize; /* Prefetch Read Size (Cache Lines) */ Loading @@ -34,8 +34,8 @@ struct vme_slave { int enable; /* State of Window */ unsigned long long vme_addr; /* Starting Address on the VMEbus */ unsigned long long size; /* Window Size */ vme_address_t aspace; /* Address Space */ vme_cycle_t cycle; /* Cycle properties */ u32 aspace; /* Address Space */ u32 cycle; /* Cycle properties */ #if 0 char wrPostEnable; /* Write Post State */ char rmwLock; /* Lock PCI during RMW Cycles */ Loading drivers/staging/vme/vme.c +17 −21 Original line number Diff line number Diff line Loading @@ -153,9 +153,7 @@ size_t vme_get_size(struct vme_resource *resource) int enabled, retval; unsigned long long base, size; dma_addr_t buf_base; vme_address_t aspace; vme_cycle_t cycle; vme_width_t dwidth; u32 aspace, cycle, dwidth; switch (resource->type) { case VME_MASTER: Loading @@ -181,7 +179,7 @@ size_t vme_get_size(struct vme_resource *resource) } EXPORT_SYMBOL(vme_get_size); static int vme_check_window(vme_address_t aspace, unsigned long long vme_base, static int vme_check_window(u32 aspace, unsigned long long vme_base, unsigned long long size) { int retval = 0; Loading Loading @@ -232,8 +230,8 @@ static int vme_check_window(vme_address_t aspace, unsigned long long vme_base, * Request a slave image with specific attributes, return some unique * identifier. */ struct vme_resource *vme_slave_request(struct vme_dev *vdev, vme_address_t address, vme_cycle_t cycle) struct vme_resource *vme_slave_request(struct vme_dev *vdev, u32 address, u32 cycle) { struct vme_bridge *bridge; struct list_head *slave_pos = NULL; Loading Loading @@ -298,7 +296,7 @@ EXPORT_SYMBOL(vme_slave_request); int vme_slave_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t buf_base, vme_address_t aspace, vme_cycle_t cycle) dma_addr_t buf_base, u32 aspace, u32 cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_slave_resource *image; Loading Loading @@ -333,7 +331,7 @@ EXPORT_SYMBOL(vme_slave_set); int vme_slave_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *buf_base, vme_address_t *aspace, vme_cycle_t *cycle) dma_addr_t *buf_base, u32 *aspace, u32 *cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_slave_resource *image; Loading Loading @@ -388,8 +386,8 @@ EXPORT_SYMBOL(vme_slave_free); * Request a master image with specific attributes, return some unique * identifier. */ struct vme_resource *vme_master_request(struct vme_dev *vdev, vme_address_t address, vme_cycle_t cycle, vme_width_t dwidth) struct vme_resource *vme_master_request(struct vme_dev *vdev, u32 address, u32 cycle, u32 dwidth) { struct vme_bridge *bridge; struct list_head *master_pos = NULL; Loading Loading @@ -456,8 +454,8 @@ err_bus: EXPORT_SYMBOL(vme_master_request); int vme_master_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; Loading Loading @@ -492,8 +490,8 @@ int vme_master_set(struct vme_resource *resource, int enabled, EXPORT_SYMBOL(vme_master_set); int vme_master_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; Loading Loading @@ -646,8 +644,7 @@ EXPORT_SYMBOL(vme_master_free); * Request a DMA controller with specific attributes, return some unique * identifier. */ struct vme_resource *vme_dma_request(struct vme_dev *vdev, vme_dma_route_t route) struct vme_resource *vme_dma_request(struct vme_dev *vdev, u32 route) { struct vme_bridge *bridge; struct list_head *dma_pos = NULL; Loading Loading @@ -743,8 +740,7 @@ EXPORT_SYMBOL(vme_new_dma_list); /* * Create "Pattern" type attributes */ struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, vme_pattern_t type) struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, u32 type) { struct vme_dma_attr *attributes; struct vme_dma_pattern *pattern_attr; Loading Loading @@ -822,7 +818,7 @@ EXPORT_SYMBOL(vme_dma_pci_attribute); * Create "VME" type attributes */ struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long address, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) u32 aspace, u32 cycle, u32 dwidth) { struct vme_dma_attr *attributes; struct vme_dma_vme *vme_attr; Loading Loading @@ -1173,7 +1169,7 @@ int vme_lm_count(struct vme_resource *resource) EXPORT_SYMBOL(vme_lm_count); int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, vme_address_t aspace, vme_cycle_t cycle) u32 aspace, u32 cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_lm_resource *lm; Loading @@ -1195,7 +1191,7 @@ int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, EXPORT_SYMBOL(vme_lm_set); int vme_lm_get(struct vme_resource *resource, unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) u32 *aspace, u32 *cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_lm_resource *lm; Loading drivers/staging/vme/vme.h +12 −24 Original line number Diff line number Diff line Loading @@ -10,7 +10,6 @@ enum vme_resource_type { }; /* VME Address Spaces */ typedef u32 vme_address_t; #define VME_A16 0x1 #define VME_A24 0x2 #define VME_A32 0x4 Loading @@ -29,7 +28,6 @@ typedef u32 vme_address_t; /* VME Cycle Types */ typedef u32 vme_cycle_t; #define VME_SCT 0x1 #define VME_BLT 0x2 #define VME_MBLT 0x4 Loading @@ -47,28 +45,23 @@ typedef u32 vme_cycle_t; #define VME_DATA 0x8000 /* VME Data Widths */ typedef u32 vme_width_t; #define VME_D8 0x1 #define VME_D16 0x2 #define VME_D32 0x4 #define VME_D64 0x8 /* Arbitration Scheduling Modes */ typedef u32 vme_arbitration_t; #define VME_R_ROBIN_MODE 0x1 #define VME_PRIORITY_MODE 0x2 typedef u32 vme_dma_t; #define VME_DMA_PATTERN (1<<0) #define VME_DMA_PCI (1<<1) #define VME_DMA_VME (1<<2) typedef u32 vme_pattern_t; #define VME_DMA_PATTERN_BYTE (1<<0) #define VME_DMA_PATTERN_WORD (1<<1) #define VME_DMA_PATTERN_INCREMENT (1<<2) typedef u32 vme_dma_route_t; #define VME_DMA_VME_TO_MEM (1<<0) #define VME_DMA_MEM_TO_VME (1<<1) #define VME_DMA_VME_TO_VME (1<<2) Loading @@ -77,7 +70,7 @@ typedef u32 vme_dma_route_t; #define VME_DMA_PATTERN_TO_MEM (1<<5) struct vme_dma_attr { vme_dma_t type; u32 type; void *private; }; Loading Loading @@ -128,32 +121,29 @@ void vme_free_consistent(struct vme_resource *, size_t, void *, size_t vme_get_size(struct vme_resource *); struct vme_resource *vme_slave_request(struct vme_dev *, vme_address_t, vme_cycle_t); struct vme_resource *vme_slave_request(struct vme_dev *, u32, u32); int vme_slave_set(struct vme_resource *, int, unsigned long long, unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t); unsigned long long, dma_addr_t, u32, u32); int vme_slave_get(struct vme_resource *, int *, unsigned long long *, unsigned long long *, dma_addr_t *, vme_address_t *, vme_cycle_t *); unsigned long long *, dma_addr_t *, u32 *, u32 *); void vme_slave_free(struct vme_resource *); struct vme_resource *vme_master_request(struct vme_dev *, vme_address_t, vme_cycle_t, vme_width_t); struct vme_resource *vme_master_request(struct vme_dev *, u32, u32, u32); int vme_master_set(struct vme_resource *, int, unsigned long long, unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); unsigned long long, u32, u32, u32); int vme_master_get(struct vme_resource *, int *, unsigned long long *, unsigned long long *, vme_address_t *, vme_cycle_t *, vme_width_t *); unsigned long long *, u32 *, u32 *, u32 *); ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t); ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t); unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int, unsigned int, loff_t); void vme_master_free(struct vme_resource *); struct vme_resource *vme_dma_request(struct vme_dev *, vme_dma_route_t); struct vme_resource *vme_dma_request(struct vme_dev *, u32); struct vme_dma_list *vme_new_dma_list(struct vme_resource *); struct vme_dma_attr *vme_dma_pattern_attribute(u32, vme_pattern_t); struct vme_dma_attr *vme_dma_pattern_attribute(u32, u32); struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t); struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long, u32, u32, u32); void vme_dma_free_attribute(struct vme_dma_attr *); int vme_dma_list_add(struct vme_dma_list *, struct vme_dma_attr *, struct vme_dma_attr *, size_t); Loading @@ -168,10 +158,8 @@ int vme_irq_generate(struct vme_dev *, int, int); struct vme_resource * vme_lm_request(struct vme_dev *); int vme_lm_count(struct vme_resource *); int vme_lm_set(struct vme_resource *, unsigned long long, vme_address_t, vme_cycle_t); int vme_lm_get(struct vme_resource *, unsigned long long *, vme_address_t *, vme_cycle_t *); int vme_lm_set(struct vme_resource *, unsigned long long, u32, u32); int vme_lm_get(struct vme_resource *, unsigned long long *, u32 *, u32 *); int vme_lm_attach(struct vme_resource *, int, void (*callback)(int)); int vme_lm_detach(struct vme_resource *, int); void vme_lm_free(struct vme_resource *); Loading Loading
drivers/staging/vme/bridges/vme_ca91cx42.c +9 −9 Original line number Diff line number Diff line Loading @@ -338,7 +338,7 @@ static int ca91cx42_irq_generate(struct vme_bridge *ca91cx42_bridge, int level, static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) dma_addr_t pci_base, u32 aspace, u32 cycle) { unsigned int i, addr = 0, granularity; unsigned int temp_ctl = 0; Loading Loading @@ -444,7 +444,7 @@ static int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, static int ca91cx42_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *pci_base, vme_address_t *aspace, vme_cycle_t *cycle) dma_addr_t *pci_base, u32 *aspace, u32 *cycle) { unsigned int i, granularity = 0, ctl = 0; unsigned long long vme_bound, pci_offset; Loading Loading @@ -595,8 +595,8 @@ static void ca91cx42_free_resource(struct vme_master_resource *image) static int ca91cx42_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) { int retval = 0; unsigned int i, granularity = 0; Loading Loading @@ -753,7 +753,7 @@ err_window: static int __ca91cx42_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) u32 *aspace, u32 *cycle, u32 *dwidth) { unsigned int i, ctl; unsigned long long pci_base, pci_bound, vme_offset; Loading Loading @@ -839,8 +839,8 @@ static int __ca91cx42_master_get(struct vme_master_resource *image, } static int ca91cx42_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { int retval; Loading Loading @@ -1292,7 +1292,7 @@ static int ca91cx42_dma_list_empty(struct vme_dma_list *list) * callback is attached and disabled when the last callback is removed. */ static int ca91cx42_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, vme_address_t aspace, vme_cycle_t cycle) unsigned long long lm_base, u32 aspace, u32 cycle) { u32 temp_base, lm_ctl = 0; int i; Loading Loading @@ -1360,7 +1360,7 @@ static int ca91cx42_lm_set(struct vme_lm_resource *lm, * or disabled. */ static int ca91cx42_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) unsigned long long *lm_base, u32 *aspace, u32 *cycle) { u32 lm_ctl, enabled = 0; struct ca91cx42_driver *bridge; Loading
drivers/staging/vme/bridges/vme_tsi148.c +16 −20 Original line number Diff line number Diff line Loading @@ -483,7 +483,7 @@ static int tsi148_irq_generate(struct vme_bridge *tsi148_bridge, int level, * Find the first error in this address range */ static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge, vme_address_t aspace, unsigned long long address, size_t count) u32 aspace, unsigned long long address, size_t count) { struct list_head *err_pos; struct vme_bus_error *vme_err, *valid = NULL; Loading Loading @@ -517,7 +517,7 @@ static struct vme_bus_error *tsi148_find_error(struct vme_bridge *tsi148_bridge, * Clear errors in the provided address range. */ static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge, vme_address_t aspace, unsigned long long address, size_t count) u32 aspace, unsigned long long address, size_t count) { struct list_head *err_pos, *temp; struct vme_bus_error *vme_err; Loading Loading @@ -551,7 +551,7 @@ static void tsi148_clear_errors(struct vme_bridge *tsi148_bridge, */ static int tsi148_slave_set(struct vme_slave_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t pci_base, vme_address_t aspace, vme_cycle_t cycle) dma_addr_t pci_base, u32 aspace, u32 cycle) { unsigned int i, addr = 0, granularity = 0; unsigned int temp_ctl = 0; Loading Loading @@ -701,7 +701,7 @@ static int tsi148_slave_set(struct vme_slave_resource *image, int enabled, */ static int tsi148_slave_get(struct vme_slave_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *pci_base, vme_address_t *aspace, vme_cycle_t *cycle) dma_addr_t *pci_base, u32 *aspace, u32 *cycle) { unsigned int i, granularity = 0, ctl = 0; unsigned int vme_base_low, vme_base_high; Loading Loading @@ -893,8 +893,8 @@ static void tsi148_free_resource(struct vme_master_resource *image) * Set the attributes of an outbound window. */ static int tsi148_master_set(struct vme_master_resource *image, int enabled, unsigned long long vme_base, unsigned long long size, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) { int retval = 0; unsigned int i; Loading Loading @@ -1129,8 +1129,8 @@ err_window: * XXX Not parsing prefetch information. */ static int __tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { unsigned int i, ctl; unsigned int pci_base_low, pci_base_high; Loading Loading @@ -1239,8 +1239,8 @@ static int __tsi148_master_get(struct vme_master_resource *image, int *enabled, static int tsi148_master_get(struct vme_master_resource *image, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { int retval; Loading @@ -1259,9 +1259,7 @@ static ssize_t tsi148_master_read(struct vme_master_resource *image, void *buf, { int retval, enabled; unsigned long long vme_base, size; vme_address_t aspace; vme_cycle_t cycle; vme_width_t dwidth; u32 aspace, cycle, dwidth; struct vme_bus_error *vme_err = NULL; struct vme_bridge *tsi148_bridge; Loading Loading @@ -1301,9 +1299,7 @@ static ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, { int retval = 0, enabled; unsigned long long vme_base, size; vme_address_t aspace; vme_cycle_t cycle; vme_width_t dwidth; u32 aspace, cycle, dwidth; struct vme_bus_error *vme_err = NULL; struct vme_bridge *tsi148_bridge; Loading Loading @@ -1420,7 +1416,7 @@ static unsigned int tsi148_master_rmw(struct vme_master_resource *image, } static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) u32 aspace, u32 cycle, u32 dwidth) { /* Setup 2eSST speeds */ switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { Loading Loading @@ -1514,7 +1510,7 @@ static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr, } static int tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) u32 aspace, u32 cycle, u32 dwidth) { /* Setup 2eSST speeds */ switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { Loading Loading @@ -1886,7 +1882,7 @@ static int tsi148_dma_list_empty(struct vme_dma_list *list) * callback is attached and disabled when the last callback is removed. */ static int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, vme_address_t aspace, vme_cycle_t cycle) u32 aspace, u32 cycle) { u32 lm_base_high, lm_base_low, lm_ctl = 0; int i; Loading Loading @@ -1953,7 +1949,7 @@ static int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, * or disabled. */ static int tsi148_lm_get(struct vme_lm_resource *lm, unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) unsigned long long *lm_base, u32 *aspace, u32 *cycle) { u32 lm_base_high, lm_base_low, lm_ctl, enabled = 0; struct tsi148_driver *bridge; Loading
drivers/staging/vme/devices/vme_user.h +5 −5 Original line number Diff line number Diff line Loading @@ -10,9 +10,9 @@ struct vme_master { int enable; /* State of Window */ unsigned long long vme_addr; /* Starting Address on the VMEbus */ unsigned long long size; /* Window Size */ vme_address_t aspace; /* Address Space */ vme_cycle_t cycle; /* Cycle properties */ vme_width_t dwidth; /* Maximum Data Width */ u32 aspace; /* Address Space */ u32 cycle; /* Cycle properties */ u32 dwidth; /* Maximum Data Width */ #if 0 char prefetchEnable; /* Prefetch Read Enable State */ int prefetchSize; /* Prefetch Read Size (Cache Lines) */ Loading @@ -34,8 +34,8 @@ struct vme_slave { int enable; /* State of Window */ unsigned long long vme_addr; /* Starting Address on the VMEbus */ unsigned long long size; /* Window Size */ vme_address_t aspace; /* Address Space */ vme_cycle_t cycle; /* Cycle properties */ u32 aspace; /* Address Space */ u32 cycle; /* Cycle properties */ #if 0 char wrPostEnable; /* Write Post State */ char rmwLock; /* Lock PCI during RMW Cycles */ Loading
drivers/staging/vme/vme.c +17 −21 Original line number Diff line number Diff line Loading @@ -153,9 +153,7 @@ size_t vme_get_size(struct vme_resource *resource) int enabled, retval; unsigned long long base, size; dma_addr_t buf_base; vme_address_t aspace; vme_cycle_t cycle; vme_width_t dwidth; u32 aspace, cycle, dwidth; switch (resource->type) { case VME_MASTER: Loading @@ -181,7 +179,7 @@ size_t vme_get_size(struct vme_resource *resource) } EXPORT_SYMBOL(vme_get_size); static int vme_check_window(vme_address_t aspace, unsigned long long vme_base, static int vme_check_window(u32 aspace, unsigned long long vme_base, unsigned long long size) { int retval = 0; Loading Loading @@ -232,8 +230,8 @@ static int vme_check_window(vme_address_t aspace, unsigned long long vme_base, * Request a slave image with specific attributes, return some unique * identifier. */ struct vme_resource *vme_slave_request(struct vme_dev *vdev, vme_address_t address, vme_cycle_t cycle) struct vme_resource *vme_slave_request(struct vme_dev *vdev, u32 address, u32 cycle) { struct vme_bridge *bridge; struct list_head *slave_pos = NULL; Loading Loading @@ -298,7 +296,7 @@ EXPORT_SYMBOL(vme_slave_request); int vme_slave_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, dma_addr_t buf_base, vme_address_t aspace, vme_cycle_t cycle) dma_addr_t buf_base, u32 aspace, u32 cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_slave_resource *image; Loading Loading @@ -333,7 +331,7 @@ EXPORT_SYMBOL(vme_slave_set); int vme_slave_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, dma_addr_t *buf_base, vme_address_t *aspace, vme_cycle_t *cycle) dma_addr_t *buf_base, u32 *aspace, u32 *cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_slave_resource *image; Loading Loading @@ -388,8 +386,8 @@ EXPORT_SYMBOL(vme_slave_free); * Request a master image with specific attributes, return some unique * identifier. */ struct vme_resource *vme_master_request(struct vme_dev *vdev, vme_address_t address, vme_cycle_t cycle, vme_width_t dwidth) struct vme_resource *vme_master_request(struct vme_dev *vdev, u32 address, u32 cycle, u32 dwidth) { struct vme_bridge *bridge; struct list_head *master_pos = NULL; Loading Loading @@ -456,8 +454,8 @@ err_bus: EXPORT_SYMBOL(vme_master_request); int vme_master_set(struct vme_resource *resource, int enabled, unsigned long long vme_base, unsigned long long size, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) unsigned long long vme_base, unsigned long long size, u32 aspace, u32 cycle, u32 dwidth) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; Loading Loading @@ -492,8 +490,8 @@ int vme_master_set(struct vme_resource *resource, int enabled, EXPORT_SYMBOL(vme_master_set); int vme_master_get(struct vme_resource *resource, int *enabled, unsigned long long *vme_base, unsigned long long *size, vme_address_t *aspace, vme_cycle_t *cycle, vme_width_t *dwidth) unsigned long long *vme_base, unsigned long long *size, u32 *aspace, u32 *cycle, u32 *dwidth) { struct vme_bridge *bridge = find_bridge(resource); struct vme_master_resource *image; Loading Loading @@ -646,8 +644,7 @@ EXPORT_SYMBOL(vme_master_free); * Request a DMA controller with specific attributes, return some unique * identifier. */ struct vme_resource *vme_dma_request(struct vme_dev *vdev, vme_dma_route_t route) struct vme_resource *vme_dma_request(struct vme_dev *vdev, u32 route) { struct vme_bridge *bridge; struct list_head *dma_pos = NULL; Loading Loading @@ -743,8 +740,7 @@ EXPORT_SYMBOL(vme_new_dma_list); /* * Create "Pattern" type attributes */ struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, vme_pattern_t type) struct vme_dma_attr *vme_dma_pattern_attribute(u32 pattern, u32 type) { struct vme_dma_attr *attributes; struct vme_dma_pattern *pattern_attr; Loading Loading @@ -822,7 +818,7 @@ EXPORT_SYMBOL(vme_dma_pci_attribute); * Create "VME" type attributes */ struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long address, vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth) u32 aspace, u32 cycle, u32 dwidth) { struct vme_dma_attr *attributes; struct vme_dma_vme *vme_attr; Loading Loading @@ -1173,7 +1169,7 @@ int vme_lm_count(struct vme_resource *resource) EXPORT_SYMBOL(vme_lm_count); int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, vme_address_t aspace, vme_cycle_t cycle) u32 aspace, u32 cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_lm_resource *lm; Loading @@ -1195,7 +1191,7 @@ int vme_lm_set(struct vme_resource *resource, unsigned long long lm_base, EXPORT_SYMBOL(vme_lm_set); int vme_lm_get(struct vme_resource *resource, unsigned long long *lm_base, vme_address_t *aspace, vme_cycle_t *cycle) u32 *aspace, u32 *cycle) { struct vme_bridge *bridge = find_bridge(resource); struct vme_lm_resource *lm; Loading
drivers/staging/vme/vme.h +12 −24 Original line number Diff line number Diff line Loading @@ -10,7 +10,6 @@ enum vme_resource_type { }; /* VME Address Spaces */ typedef u32 vme_address_t; #define VME_A16 0x1 #define VME_A24 0x2 #define VME_A32 0x4 Loading @@ -29,7 +28,6 @@ typedef u32 vme_address_t; /* VME Cycle Types */ typedef u32 vme_cycle_t; #define VME_SCT 0x1 #define VME_BLT 0x2 #define VME_MBLT 0x4 Loading @@ -47,28 +45,23 @@ typedef u32 vme_cycle_t; #define VME_DATA 0x8000 /* VME Data Widths */ typedef u32 vme_width_t; #define VME_D8 0x1 #define VME_D16 0x2 #define VME_D32 0x4 #define VME_D64 0x8 /* Arbitration Scheduling Modes */ typedef u32 vme_arbitration_t; #define VME_R_ROBIN_MODE 0x1 #define VME_PRIORITY_MODE 0x2 typedef u32 vme_dma_t; #define VME_DMA_PATTERN (1<<0) #define VME_DMA_PCI (1<<1) #define VME_DMA_VME (1<<2) typedef u32 vme_pattern_t; #define VME_DMA_PATTERN_BYTE (1<<0) #define VME_DMA_PATTERN_WORD (1<<1) #define VME_DMA_PATTERN_INCREMENT (1<<2) typedef u32 vme_dma_route_t; #define VME_DMA_VME_TO_MEM (1<<0) #define VME_DMA_MEM_TO_VME (1<<1) #define VME_DMA_VME_TO_VME (1<<2) Loading @@ -77,7 +70,7 @@ typedef u32 vme_dma_route_t; #define VME_DMA_PATTERN_TO_MEM (1<<5) struct vme_dma_attr { vme_dma_t type; u32 type; void *private; }; Loading Loading @@ -128,32 +121,29 @@ void vme_free_consistent(struct vme_resource *, size_t, void *, size_t vme_get_size(struct vme_resource *); struct vme_resource *vme_slave_request(struct vme_dev *, vme_address_t, vme_cycle_t); struct vme_resource *vme_slave_request(struct vme_dev *, u32, u32); int vme_slave_set(struct vme_resource *, int, unsigned long long, unsigned long long, dma_addr_t, vme_address_t, vme_cycle_t); unsigned long long, dma_addr_t, u32, u32); int vme_slave_get(struct vme_resource *, int *, unsigned long long *, unsigned long long *, dma_addr_t *, vme_address_t *, vme_cycle_t *); unsigned long long *, dma_addr_t *, u32 *, u32 *); void vme_slave_free(struct vme_resource *); struct vme_resource *vme_master_request(struct vme_dev *, vme_address_t, vme_cycle_t, vme_width_t); struct vme_resource *vme_master_request(struct vme_dev *, u32, u32, u32); int vme_master_set(struct vme_resource *, int, unsigned long long, unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); unsigned long long, u32, u32, u32); int vme_master_get(struct vme_resource *, int *, unsigned long long *, unsigned long long *, vme_address_t *, vme_cycle_t *, vme_width_t *); unsigned long long *, u32 *, u32 *, u32 *); ssize_t vme_master_read(struct vme_resource *, void *, size_t, loff_t); ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t); unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int, unsigned int, loff_t); void vme_master_free(struct vme_resource *); struct vme_resource *vme_dma_request(struct vme_dev *, vme_dma_route_t); struct vme_resource *vme_dma_request(struct vme_dev *, u32); struct vme_dma_list *vme_new_dma_list(struct vme_resource *); struct vme_dma_attr *vme_dma_pattern_attribute(u32, vme_pattern_t); struct vme_dma_attr *vme_dma_pattern_attribute(u32, u32); struct vme_dma_attr *vme_dma_pci_attribute(dma_addr_t); struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long, vme_address_t, vme_cycle_t, vme_width_t); struct vme_dma_attr *vme_dma_vme_attribute(unsigned long long, u32, u32, u32); void vme_dma_free_attribute(struct vme_dma_attr *); int vme_dma_list_add(struct vme_dma_list *, struct vme_dma_attr *, struct vme_dma_attr *, size_t); Loading @@ -168,10 +158,8 @@ int vme_irq_generate(struct vme_dev *, int, int); struct vme_resource * vme_lm_request(struct vme_dev *); int vme_lm_count(struct vme_resource *); int vme_lm_set(struct vme_resource *, unsigned long long, vme_address_t, vme_cycle_t); int vme_lm_get(struct vme_resource *, unsigned long long *, vme_address_t *, vme_cycle_t *); int vme_lm_set(struct vme_resource *, unsigned long long, u32, u32); int vme_lm_get(struct vme_resource *, unsigned long long *, u32 *, u32 *); int vme_lm_attach(struct vme_resource *, int, void (*callback)(int)); int vme_lm_detach(struct vme_resource *, int); void vme_lm_free(struct vme_resource *); Loading