Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 58 SUBLEVEL = 59 EXTRAVERSION = NAME = Roaring Lionus Loading arch/parisc/kernel/syscall.S +3 −3 Original line number Diff line number Diff line Loading @@ -742,7 +742,7 @@ lws_compare_and_swap_2: 10: ldd 0(%r25), %r25 11: ldd 0(%r24), %r24 #else /* Load new value into r22/r23 - high/low */ /* Load old value into r22/r23 - high/low */ 10: ldw 0(%r25), %r22 11: ldw 4(%r25), %r23 /* Load new value into fr4 for atomic store later */ Loading Loading @@ -834,11 +834,11 @@ cas2_action: copy %r0, %r28 #else /* Compare first word */ 19: ldw,ma 0(%r26), %r29 19: ldw 0(%r26), %r29 sub,= %r29, %r22, %r0 b,n cas2_end /* Compare second word */ 20: ldw,ma 4(%r26), %r29 20: ldw 4(%r26), %r29 sub,= %r29, %r23, %r0 b,n cas2_end /* Perform the store */ Loading arch/x86/kernel/cpu/microcode/intel.c +19 −0 Original line number Diff line number Diff line Loading @@ -34,6 +34,7 @@ #include <linux/mm.h> #include <asm/microcode_intel.h> #include <asm/intel-family.h> #include <asm/processor.h> #include <asm/tlbflush.h> #include <asm/setup.h> Loading Loading @@ -1046,6 +1047,18 @@ static int get_ucode_fw(void *to, const void *from, size_t n) return 0; } static bool is_blacklisted(unsigned int cpu) { struct cpuinfo_x86 *c = &cpu_data(cpu); if (c->x86 == 6 && c->x86_model == INTEL_FAM6_BROADWELL_X) { pr_err_once("late loading on model 79 is disabled.\n"); return true; } return false; } static enum ucode_state request_microcode_fw(int cpu, struct device *device, bool refresh_fw) { Loading @@ -1054,6 +1067,9 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device, const struct firmware *firmware; enum ucode_state ret; if (is_blacklisted(cpu)) return UCODE_NFOUND; sprintf(name, "intel-ucode/%02x-%02x-%02x", c->x86, c->x86_model, c->x86_mask); Loading @@ -1078,6 +1094,9 @@ static int get_ucode_user(void *to, const void *from, size_t n) static enum ucode_state request_microcode_user(int cpu, const void __user *buf, size_t size) { if (is_blacklisted(cpu)) return UCODE_NFOUND; return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user); } Loading crypto/asymmetric_keys/pkcs7_parser.c +3 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,9 @@ static int pkcs7_check_authattrs(struct pkcs7_message *msg) bool want = false; sinfo = msg->signed_infos; if (!sinfo) goto inconsistent; if (sinfo->authattrs) { want = true; msg->have_authattrs = true; Loading drivers/bus/mvebu-mbus.c +1 −1 Original line number Diff line number Diff line Loading @@ -720,7 +720,7 @@ mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus) if (mbus->hw_io_coherency) w->mbus_attr |= ATTR_HW_COHERENCY; w->base = base & DDR_BASE_CS_LOW_MASK; w->size = (size | ~DDR_SIZE_MASK) + 1; w->size = (u64)(size | ~DDR_SIZE_MASK) + 1; } } mvebu_mbus_dram_info.num_cs = cs; Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 9 SUBLEVEL = 58 SUBLEVEL = 59 EXTRAVERSION = NAME = Roaring Lionus Loading
arch/parisc/kernel/syscall.S +3 −3 Original line number Diff line number Diff line Loading @@ -742,7 +742,7 @@ lws_compare_and_swap_2: 10: ldd 0(%r25), %r25 11: ldd 0(%r24), %r24 #else /* Load new value into r22/r23 - high/low */ /* Load old value into r22/r23 - high/low */ 10: ldw 0(%r25), %r22 11: ldw 4(%r25), %r23 /* Load new value into fr4 for atomic store later */ Loading Loading @@ -834,11 +834,11 @@ cas2_action: copy %r0, %r28 #else /* Compare first word */ 19: ldw,ma 0(%r26), %r29 19: ldw 0(%r26), %r29 sub,= %r29, %r22, %r0 b,n cas2_end /* Compare second word */ 20: ldw,ma 4(%r26), %r29 20: ldw 4(%r26), %r29 sub,= %r29, %r23, %r0 b,n cas2_end /* Perform the store */ Loading
arch/x86/kernel/cpu/microcode/intel.c +19 −0 Original line number Diff line number Diff line Loading @@ -34,6 +34,7 @@ #include <linux/mm.h> #include <asm/microcode_intel.h> #include <asm/intel-family.h> #include <asm/processor.h> #include <asm/tlbflush.h> #include <asm/setup.h> Loading Loading @@ -1046,6 +1047,18 @@ static int get_ucode_fw(void *to, const void *from, size_t n) return 0; } static bool is_blacklisted(unsigned int cpu) { struct cpuinfo_x86 *c = &cpu_data(cpu); if (c->x86 == 6 && c->x86_model == INTEL_FAM6_BROADWELL_X) { pr_err_once("late loading on model 79 is disabled.\n"); return true; } return false; } static enum ucode_state request_microcode_fw(int cpu, struct device *device, bool refresh_fw) { Loading @@ -1054,6 +1067,9 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device, const struct firmware *firmware; enum ucode_state ret; if (is_blacklisted(cpu)) return UCODE_NFOUND; sprintf(name, "intel-ucode/%02x-%02x-%02x", c->x86, c->x86_model, c->x86_mask); Loading @@ -1078,6 +1094,9 @@ static int get_ucode_user(void *to, const void *from, size_t n) static enum ucode_state request_microcode_user(int cpu, const void __user *buf, size_t size) { if (is_blacklisted(cpu)) return UCODE_NFOUND; return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user); } Loading
crypto/asymmetric_keys/pkcs7_parser.c +3 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,9 @@ static int pkcs7_check_authattrs(struct pkcs7_message *msg) bool want = false; sinfo = msg->signed_infos; if (!sinfo) goto inconsistent; if (sinfo->authattrs) { want = true; msg->have_authattrs = true; Loading
drivers/bus/mvebu-mbus.c +1 −1 Original line number Diff line number Diff line Loading @@ -720,7 +720,7 @@ mvebu_mbus_default_setup_cpu_target(struct mvebu_mbus_state *mbus) if (mbus->hw_io_coherency) w->mbus_attr |= ATTR_HW_COHERENCY; w->base = base & DDR_BASE_CS_LOW_MASK; w->size = (size | ~DDR_SIZE_MASK) + 1; w->size = (u64)(size | ~DDR_SIZE_MASK) + 1; } } mvebu_mbus_dram_info.num_cs = cs; Loading