Loading drivers/spi/Kconfig +3 −2 Original line number Diff line number Diff line Loading @@ -463,7 +463,8 @@ config SPI_ORION tristate "Orion SPI master" depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST help This enables using the SPI master controller on the Orion chips. This enables using the SPI master controller on the Orion and MVEBU chips. config SPI_PIC32 tristate "Microchip PIC32 series SPI" Loading Loading @@ -565,7 +566,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate "Samsung S3C64XX series type SPI" depends on (PLAT_SAMSUNG || ARCH_EXYNOS) depends on (PLAT_SAMSUNG || ARCH_EXYNOS || COMPILE_TEST) help SPI driver for Samsung S3C64XX and newer SoCs. Loading drivers/spi/spi-pxa2xx.h +0 −1 Original line number Diff line number Diff line Loading @@ -109,7 +109,6 @@ static inline void pxa2xx_spi_write(const struct driver_data *drv_data, #define DONE_STATE ((void *)2) #define ERROR_STATE ((void *)-1) #define IS_DMA_ALIGNED(x) IS_ALIGNED((unsigned long)(x), DMA_ALIGNMENT) #define DMA_ALIGNMENT 8 static inline int pxa25x_ssp_comp(struct driver_data *drv_data) Loading drivers/spi/spi-rspi.c +47 −5 Original line number Diff line number Diff line Loading @@ -413,7 +413,7 @@ static unsigned int qspi_set_send_trigger(struct rspi_data *rspi, return n; } static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) { unsigned int n; Loading @@ -428,6 +428,7 @@ static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) qspi_update(rspi, SPBFCR_RXTRG_MASK, SPBFCR_RXTRG_1B, QSPI_SPBFCR); } return n; } #define set_config_register(spi, n) spi->ops->set_config_register(spi, n) Loading Loading @@ -785,6 +786,9 @@ static int qspi_transfer_out_in(struct rspi_data *rspi, static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) { const u8 *tx = xfer->tx_buf; unsigned int n = xfer->len; unsigned int i, len; int ret; if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) { Loading @@ -793,9 +797,23 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) return ret; } ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len); while (n > 0) { len = qspi_set_send_trigger(rspi, n); if (len == QSPI_BUFFER_SIZE) { ret = rspi_wait_for_tx_empty(rspi); if (ret < 0) { dev_err(&rspi->master->dev, "transmit timeout\n"); return ret; } for (i = 0; i < len; i++) rspi_write_data(rspi, *tx++); } else { ret = rspi_pio_transfer(rspi, tx, NULL, n); if (ret < 0) return ret; } n -= len; } /* Wait for the last transmission */ rspi_wait_for_tx_empty(rspi); Loading @@ -805,13 +823,37 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer) { u8 *rx = xfer->rx_buf; unsigned int n = xfer->len; unsigned int i, len; int ret; if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) { int ret = rspi_dma_transfer(rspi, NULL, &xfer->rx_sg); if (ret != -EAGAIN) return ret; } return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len); while (n > 0) { len = qspi_set_receive_trigger(rspi, n); if (len == QSPI_BUFFER_SIZE) { ret = rspi_wait_for_rx_full(rspi); if (ret < 0) { dev_err(&rspi->master->dev, "receive timeout\n"); return ret; } for (i = 0; i < len; i++) *rx++ = rspi_read_data(rspi); } else { ret = rspi_pio_transfer(rspi, NULL, rx, n); if (ret < 0) return ret; *rx++ = ret; } n -= len; } return 0; } static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi, Loading Loading
drivers/spi/Kconfig +3 −2 Original line number Diff line number Diff line Loading @@ -463,7 +463,8 @@ config SPI_ORION tristate "Orion SPI master" depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST help This enables using the SPI master controller on the Orion chips. This enables using the SPI master controller on the Orion and MVEBU chips. config SPI_PIC32 tristate "Microchip PIC32 series SPI" Loading Loading @@ -565,7 +566,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate "Samsung S3C64XX series type SPI" depends on (PLAT_SAMSUNG || ARCH_EXYNOS) depends on (PLAT_SAMSUNG || ARCH_EXYNOS || COMPILE_TEST) help SPI driver for Samsung S3C64XX and newer SoCs. Loading
drivers/spi/spi-pxa2xx.h +0 −1 Original line number Diff line number Diff line Loading @@ -109,7 +109,6 @@ static inline void pxa2xx_spi_write(const struct driver_data *drv_data, #define DONE_STATE ((void *)2) #define ERROR_STATE ((void *)-1) #define IS_DMA_ALIGNED(x) IS_ALIGNED((unsigned long)(x), DMA_ALIGNMENT) #define DMA_ALIGNMENT 8 static inline int pxa25x_ssp_comp(struct driver_data *drv_data) Loading
drivers/spi/spi-rspi.c +47 −5 Original line number Diff line number Diff line Loading @@ -413,7 +413,7 @@ static unsigned int qspi_set_send_trigger(struct rspi_data *rspi, return n; } static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) { unsigned int n; Loading @@ -428,6 +428,7 @@ static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len) qspi_update(rspi, SPBFCR_RXTRG_MASK, SPBFCR_RXTRG_1B, QSPI_SPBFCR); } return n; } #define set_config_register(spi, n) spi->ops->set_config_register(spi, n) Loading Loading @@ -785,6 +786,9 @@ static int qspi_transfer_out_in(struct rspi_data *rspi, static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) { const u8 *tx = xfer->tx_buf; unsigned int n = xfer->len; unsigned int i, len; int ret; if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) { Loading @@ -793,9 +797,23 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) return ret; } ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len); while (n > 0) { len = qspi_set_send_trigger(rspi, n); if (len == QSPI_BUFFER_SIZE) { ret = rspi_wait_for_tx_empty(rspi); if (ret < 0) { dev_err(&rspi->master->dev, "transmit timeout\n"); return ret; } for (i = 0; i < len; i++) rspi_write_data(rspi, *tx++); } else { ret = rspi_pio_transfer(rspi, tx, NULL, n); if (ret < 0) return ret; } n -= len; } /* Wait for the last transmission */ rspi_wait_for_tx_empty(rspi); Loading @@ -805,13 +823,37 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer) { u8 *rx = xfer->rx_buf; unsigned int n = xfer->len; unsigned int i, len; int ret; if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) { int ret = rspi_dma_transfer(rspi, NULL, &xfer->rx_sg); if (ret != -EAGAIN) return ret; } return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len); while (n > 0) { len = qspi_set_receive_trigger(rspi, n); if (len == QSPI_BUFFER_SIZE) { ret = rspi_wait_for_rx_full(rspi); if (ret < 0) { dev_err(&rspi->master->dev, "receive timeout\n"); return ret; } for (i = 0; i < len; i++) *rx++ = rspi_read_data(rspi); } else { ret = rspi_pio_transfer(rspi, NULL, rx, n); if (ret < 0) return ret; *rx++ = ret; } n -= len; } return 0; } static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi, Loading