Commit 4fb0bbd5 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: use pfp for all vm_flush related updates 



May fix hangs in some cases.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6e909f74

drivers/gpu/drm/radeon/cik.c

+4 −4
Original line number Diff line number Diff line
@@ -5958,14 +5958,14 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 


	/* update SH_MEM_* regs */

	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |

				 WRITE_DATA_DST_SEL(0)));

	radeon_ring_write(ring, SRBM_GFX_CNTL >> 2);

	radeon_ring_write(ring, 0);

	radeon_ring_write(ring, VMID(vm->id));



	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6));

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |

				 WRITE_DATA_DST_SEL(0)));

	radeon_ring_write(ring, SH_MEM_BASES >> 2);

	radeon_ring_write(ring, 0);
@@ -5976,7 +5976,7 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 
	radeon_ring_write(ring, 0); /* SH_MEM_APE1_LIMIT */



	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |

				 WRITE_DATA_DST_SEL(0)));

	radeon_ring_write(ring, SRBM_GFX_CNTL >> 2);

	radeon_ring_write(ring, 0);
@@ -5987,7 +5987,7 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 


	/* bits 0-15 are the VM contexts0-15 */

	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |

				 WRITE_DATA_DST_SEL(0)));

	radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2);

	radeon_ring_write(ring, 0);

drivers/gpu/drm/radeon/si.c

+2 −2
Original line number Diff line number Diff line
@@ -5028,7 +5028,7 @@ void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 


	/* flush hdp cache */

	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

				 WRITE_DATA_DST_SEL(0)));

	radeon_ring_write(ring, HDP_MEM_COHERENCY_FLUSH_CNTL >> 2);

	radeon_ring_write(ring, 0);
@@ -5036,7 +5036,7 @@ void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 


	/* bits 0-15 are the VM contexts0-15 */

	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

				 WRITE_DATA_DST_SEL(0)));

	radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2);

	radeon_ring_write(ring, 0);