Merge tag 'amlogic-drivers-2' into v4.8/dt64-2

* Amlogic GXBB AO Clock and Reset Unit

The Amlogic GXBB AO clock controller generates and supplies clock to various

controllers within the Always-On part of the SoC.

Required Properties:

- compatible: should be "amlogic,gxbb-aoclkc"

- reg: physical base address of the clock controller and length of memory

       mapped region.

- #clock-cells: should be 1.

Each clock is assigned an identifier and client nodes can use this identifier

to specify the clock which they consume. All available clocks are defined as

preprocessor macros in the dt-bindings/clock/gxbb-aoclkc.h header and can be

used in device tree sources.

- #reset-cells: should be 1.

Each reset is assigned an identifier and client nodes can use this identifier

to specify the reset which they consume. All available resets are defined as

preprocessor macros in the dt-bindings/reset/gxbb-aoclkc.h header and can be

used in device tree sources.

Example: AO Clock controller node:

	clkc_AO: clock-controller@040 {

		compatible = "amlogic,gxbb-aoclkc";

		reg = <0x0 0x040 0x0 0x4>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

Example: UART controller node that consumes the clock and reset generated

  by the clock controller:

	uart_AO: serial@4c0 {

		compatible = "amlogic,meson-uart";

		reg = <0x4c0 0x14>;

		interrupts = <0 90 1>;

		clocks = <&clkc_AO CLKID_AO_UART1>;

		resets = <&clkc_AO RESET_AO_UART1>;

		status = "disabled";

	};

* Amlogic Meson DWMAC Ethernet controller

The device inherits all the properties of the dwmac/stmmac devices

described in the file net/stmmac.txt with the following changes.

described in the file stmmac.txt in the current directory with the

following changes.

Required properties:

Required properties on all platforms:

- compatible: should be "amlogic,meson6-dwmac" along with "snps,dwmac"

	      and any applicable more detailed version number

	      described in net/stmmac.txt

- compatible:	Depending on the platform this should be one of:

			- "amlogic,meson6-dwmac"

			- "amlogic,meson8b-dwmac"

			- "amlogic,meson-gxbb-dwmac"

		Additionally "snps,dwmac" and any applicable more

		detailed version number described in net/stmmac.txt

		should be used.

- reg: should contain a register range for the dwmac controller and

       another one for the Amlogic specific configuration

- reg:	The first register range should be the one of the DWMAC

	controller. The second range is is for the Amlogic specific

	configuration (for example the PRG_ETHERNET register range

	on Meson8b and newer)

Example:

Required properties on Meson8b and newer:

- clock-names:	Should contain the following:

		- "stmmaceth" - see stmmac.txt

		- "clkin0" - first parent clock of the internal mux

		- "clkin1" - second parent clock of the internal mux

Example for Meson6:

	ethmac: ethernet@c9410000 {

		compatible = "amlogic,meson6-dwmac", "snps,dwmac";

		clocks = <&clk81>;

		clock-names = "stmmaceth";

	}

Example for GXBB:

	ethmac: ethernet@c9410000 {

		compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";

		reg = <0x0 0xc9410000 0x0 0x10000>,

			<0x0 0xc8834540 0x0 0x8>;

		interrupts = <0 8 1>;

		interrupt-names = "macirq";

		clocks = <&clkc CLKID_ETH>,

				<&clkc CLKID_FCLK_DIV2>,

				<&clkc CLKID_MPLL2>;

		clock-names = "stmmaceth", "clkin0", "clkin1";

		phy-mode = "rgmii";

		status = "disabled";

	};

* Amlogic USB2 PHY

Required properties:

- compatible:	Depending on the platform this should be one of:

	"amlogic,meson8b-usb2-phy"

	"amlogic,meson-gxbb-usb2-phy"

- reg:		The base address and length of the registers

- #phys-cells:	should be 0 (see phy-bindings.txt in this directory)

- clocks:	phandle and clock identifier for the phy clocks

- clock-names:	"usb_general" and "usb"

Optional properties:

- resets:	reference to the reset controller

- phy-supply:	see phy-bindings.txt in this directory

Example:

usb0_phy: usb_phy@0 {

	compatible = "amlogic,meson-gxbb-usb2-phy";

	#phy-cells = <0>;

	reg = <0x0 0x0 0x0 0x20>;

	resets = <&reset RESET_USB_OTG>;

	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;

	clock-names = "usb_general", "usb";

	phy-supply = <&usb_vbus>;

};

  - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;

  - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;

  - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;

  - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;

  - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;

  - snps,dwc2: A generic DWC2 USB controller with default parameters.

- reg : Should contain 1 register range (address and length)

- interrupts : Should contain 1 interrupt

#

obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o

obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o

obj-$(CONFIG_COMMON_CLK_GXBB)	 += gxbb.o

obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o

obj-$(CONFIG_COMMON_CLK_GXBB)	 += gxbb.o gxbb-aoclk.o