Loading drivers/usb/host/dwc_otg/dwc_otg_hcd.c +0 −15 Original line number Diff line number Diff line Loading @@ -938,7 +938,6 @@ static void dwc_otg_hcd_free(dwc_otg_hcd_t * dwc_otg_hcd) } else if (dwc_otg_hcd->status_buf != NULL) { DWC_FREE(dwc_otg_hcd->status_buf); } DWC_SPINLOCK_FREE(dwc_otg_hcd->channel_lock); DWC_SPINLOCK_FREE(dwc_otg_hcd->lock); /* Set core_if's lock pointer to NULL */ dwc_otg_hcd->core_if->lock = NULL; Loading Loading @@ -969,10 +968,8 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if) #if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_SPINLOCK)) DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->lock); DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->channel_lock); #else hcd->lock = DWC_SPINLOCK_ALLOC(); hcd->channel_lock = DWC_SPINLOCK_ALLOC(); #endif DWC_DEBUGPL(DBG_HCDV, "init of HCD %p given core_if %p\n", hcd, core_if); Loading Loading @@ -1997,7 +1994,6 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) dwc_otg_qh_t *qh; int num_channels; dwc_irqflags_t flags; dwc_spinlock_t *channel_lock = hcd->channel_lock; dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE; #ifdef DEBUG_HOST_CHANNELS Loading @@ -2016,13 +2012,10 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) if (microframe_schedule) { // Make sure we leave one channel for non periodic transactions. DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); if (hcd->available_host_channels <= 1) { DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); break; } hcd->available_host_channels--; DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); #ifdef DEBUG_HOST_CHANNELS last_sel_trans_num_per_scheduled++; #endif /* DEBUG_HOST_CHANNELS */ Loading @@ -2035,10 +2028,8 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) * periodic assigned schedule. */ qh_ptr = DWC_LIST_NEXT(qh_ptr); DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned, &qh->qh_list_entry); DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); } /* Loading Loading @@ -2076,13 +2067,10 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) } if (microframe_schedule) { DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); if (hcd->available_host_channels < 1) { DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); break; } hcd->available_host_channels--; DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); #ifdef DEBUG_HOST_CHANNELS last_sel_trans_num_nonper_scheduled++; #endif /* DEBUG_HOST_CHANNELS */ Loading @@ -2095,11 +2083,8 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) * non-periodic active schedule. */ qh_ptr = DWC_LIST_NEXT(qh_ptr); DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); DWC_LIST_MOVE_HEAD(&hcd->non_periodic_sched_active, &qh->qh_list_entry); DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); if (!microframe_schedule) hcd->non_periodic_channels++; Loading drivers/usb/host/dwc_otg/dwc_otg_hcd.h +0 −1 Original line number Diff line number Diff line Loading @@ -568,7 +568,6 @@ struct dwc_otg_hcd { /* */ dwc_spinlock_t *lock; dwc_spinlock_t *channel_lock; /** * Private data that could be used by OS wrapper. */ Loading drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c +0 −5 Original line number Diff line number Diff line Loading @@ -279,17 +279,12 @@ void dump_frame_list(dwc_otg_hcd_t * hcd) static void release_channel_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) { dwc_irqflags_t flags; dwc_spinlock_t *channel_lock = hcd->channel_lock; dwc_hc_t *hc = qh->channel; if (dwc_qh_is_non_per(qh)) { DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); if (!microframe_schedule) hcd->non_periodic_channels--; else hcd->available_host_channels++; DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); } else update_frame_list(hcd, qh, 0); Loading drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +0 −4 Original line number Diff line number Diff line Loading @@ -945,7 +945,6 @@ static void release_channel(dwc_otg_hcd_t * hcd, dwc_otg_transaction_type_e tr_type; int free_qtd; dwc_irqflags_t flags; dwc_spinlock_t *channel_lock = hcd->channel_lock; int hog_port = 0; Loading Loading @@ -1034,11 +1033,8 @@ cleanup: break; } } else { DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); hcd->available_host_channels++; fiq_print(FIQDBG_INT, hcd->fiq_state, "AHC = %d ", hcd->available_host_channels); DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); } /* Try to queue more transfers now that there's a free channel. */ Loading Loading
drivers/usb/host/dwc_otg/dwc_otg_hcd.c +0 −15 Original line number Diff line number Diff line Loading @@ -938,7 +938,6 @@ static void dwc_otg_hcd_free(dwc_otg_hcd_t * dwc_otg_hcd) } else if (dwc_otg_hcd->status_buf != NULL) { DWC_FREE(dwc_otg_hcd->status_buf); } DWC_SPINLOCK_FREE(dwc_otg_hcd->channel_lock); DWC_SPINLOCK_FREE(dwc_otg_hcd->lock); /* Set core_if's lock pointer to NULL */ dwc_otg_hcd->core_if->lock = NULL; Loading Loading @@ -969,10 +968,8 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if) #if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_SPINLOCK)) DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->lock); DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->channel_lock); #else hcd->lock = DWC_SPINLOCK_ALLOC(); hcd->channel_lock = DWC_SPINLOCK_ALLOC(); #endif DWC_DEBUGPL(DBG_HCDV, "init of HCD %p given core_if %p\n", hcd, core_if); Loading Loading @@ -1997,7 +1994,6 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) dwc_otg_qh_t *qh; int num_channels; dwc_irqflags_t flags; dwc_spinlock_t *channel_lock = hcd->channel_lock; dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE; #ifdef DEBUG_HOST_CHANNELS Loading @@ -2016,13 +2012,10 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) if (microframe_schedule) { // Make sure we leave one channel for non periodic transactions. DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); if (hcd->available_host_channels <= 1) { DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); break; } hcd->available_host_channels--; DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); #ifdef DEBUG_HOST_CHANNELS last_sel_trans_num_per_scheduled++; #endif /* DEBUG_HOST_CHANNELS */ Loading @@ -2035,10 +2028,8 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) * periodic assigned schedule. */ qh_ptr = DWC_LIST_NEXT(qh_ptr); DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned, &qh->qh_list_entry); DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); } /* Loading Loading @@ -2076,13 +2067,10 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) } if (microframe_schedule) { DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); if (hcd->available_host_channels < 1) { DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); break; } hcd->available_host_channels--; DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); #ifdef DEBUG_HOST_CHANNELS last_sel_trans_num_nonper_scheduled++; #endif /* DEBUG_HOST_CHANNELS */ Loading @@ -2095,11 +2083,8 @@ dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) * non-periodic active schedule. */ qh_ptr = DWC_LIST_NEXT(qh_ptr); DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); DWC_LIST_MOVE_HEAD(&hcd->non_periodic_sched_active, &qh->qh_list_entry); DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); if (!microframe_schedule) hcd->non_periodic_channels++; Loading
drivers/usb/host/dwc_otg/dwc_otg_hcd.h +0 −1 Original line number Diff line number Diff line Loading @@ -568,7 +568,6 @@ struct dwc_otg_hcd { /* */ dwc_spinlock_t *lock; dwc_spinlock_t *channel_lock; /** * Private data that could be used by OS wrapper. */ Loading
drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c +0 −5 Original line number Diff line number Diff line Loading @@ -279,17 +279,12 @@ void dump_frame_list(dwc_otg_hcd_t * hcd) static void release_channel_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) { dwc_irqflags_t flags; dwc_spinlock_t *channel_lock = hcd->channel_lock; dwc_hc_t *hc = qh->channel; if (dwc_qh_is_non_per(qh)) { DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); if (!microframe_schedule) hcd->non_periodic_channels--; else hcd->available_host_channels++; DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); } else update_frame_list(hcd, qh, 0); Loading
drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +0 −4 Original line number Diff line number Diff line Loading @@ -945,7 +945,6 @@ static void release_channel(dwc_otg_hcd_t * hcd, dwc_otg_transaction_type_e tr_type; int free_qtd; dwc_irqflags_t flags; dwc_spinlock_t *channel_lock = hcd->channel_lock; int hog_port = 0; Loading Loading @@ -1034,11 +1033,8 @@ cleanup: break; } } else { DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); hcd->available_host_channels++; fiq_print(FIQDBG_INT, hcd->fiq_state, "AHC = %d ", hcd->available_host_channels); DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); } /* Try to queue more transfers now that there's a free channel. */ Loading