Commit 20fd2ab7 authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/i915/icl: remove dpll from clk_sel



We should not pass DPLL_ID_ICL_DPLL0 or DPLL_ID_ICL_DPLL1 to this
function because the path is only taken for non-combophy ports. Let the
warning trigger if improper value is given.

While at it, rename the function to match the register name we are
trying to program.

v2: fix typo in comment

Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190125222444.19926-4-lucas.demarchi@intel.com
parent 7a61a6de
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+6 −5
Original line number Diff line number Diff line
@@ -995,7 +995,7 @@ static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
	}
}

static u32 icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder,
static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder,
				  const struct intel_crtc_state *crtc_state)
{
	const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
@@ -1004,10 +1004,11 @@ static u32 icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder,

	switch (id) {
	default:
		/*
		 * DPLL_ID_ICL_DPLL0 and DPLL_ID_ICL_DPLL1 should not be used
		 * here, so do warn if this get passed in
		 */
		MISSING_CASE(id);
		/* fall through */
	case DPLL_ID_ICL_DPLL0:
	case DPLL_ID_ICL_DPLL1:
		return DDI_CLK_SEL_NONE;
	case DPLL_ID_ICL_TBTPLL:
		switch (clock) {
@@ -2869,7 +2870,7 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder,
	if (IS_ICELAKE(dev_priv)) {
		if (!intel_port_is_combophy(dev_priv, port))
			I915_WRITE(DDI_CLK_SEL(port),
				   icl_pll_to_ddi_pll_sel(encoder, crtc_state));
				   icl_pll_to_ddi_clk_sel(encoder, crtc_state));
	} else if (IS_CANNONLAKE(dev_priv)) {
		/* Configure DPCLKA_CFGCR0 to map the DPLL to the DDI. */
		val = I915_READ(DPCLKA_CFGCR0);