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Commit 108f303f authored by Robert Jarzmik's avatar Robert Jarzmik Committed by Mike Turquette
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arm: pxa: add clock pll selection bits



Add missing bits for CCCR and CCSR :
 - CPLL and PPLL selection, either full speed or 13MHz
 - CPSR masks

Signed-off-by: default avatarRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 53f3394a
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