Loading arch/mips/ath79/dev-usb.c +28 −0 Original line number Diff line number Diff line Loading @@ -193,6 +193,32 @@ static void __init ar933x_usb_setup(void) platform_device_register(&ath79_ehci_device); } static void __init ar934x_usb_setup(void) { u32 bootstrap; bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) return; ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_HOST); udelay(1000); ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB); ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; platform_device_register(&ath79_ehci_device); } void __init ath79_register_usb(void) { if (soc_is_ar71xx()) Loading @@ -205,6 +231,8 @@ void __init ath79_register_usb(void) ar913x_usb_setup(); else if (soc_is_ar933x()) ar933x_usb_setup(); else if (soc_is_ar934x()) ar934x_usb_setup(); else BUG(); } arch/mips/include/asm/mach-ath79/ar71xx_regs.h +7 −0 Original line number Diff line number Diff line Loading @@ -63,6 +63,8 @@ #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) #define AR934X_WMAC_SIZE 0x20000 #define AR934X_EHCI_BASE 0x1b000000 #define AR934X_EHCI_SIZE 0x200 /* * DDR_CTRL block Loading Loading @@ -288,6 +290,11 @@ #define AR933X_RESET_USB_PHY BIT(4) #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) #define AR934X_RESET_USB_PHY_ANALOG BIT(11) #define AR934X_RESET_USB_HOST BIT(5) #define AR934X_RESET_USB_PHY BIT(4) #define AR934X_RESET_USBSUS_OVERRIDE BIT(3) #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) Loading Loading
arch/mips/ath79/dev-usb.c +28 −0 Original line number Diff line number Diff line Loading @@ -193,6 +193,32 @@ static void __init ar933x_usb_setup(void) platform_device_register(&ath79_ehci_device); } static void __init ar934x_usb_setup(void) { u32 bootstrap; bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) return; ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_HOST); udelay(1000); ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB); ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; platform_device_register(&ath79_ehci_device); } void __init ath79_register_usb(void) { if (soc_is_ar71xx()) Loading @@ -205,6 +231,8 @@ void __init ath79_register_usb(void) ar913x_usb_setup(); else if (soc_is_ar933x()) ar933x_usb_setup(); else if (soc_is_ar934x()) ar934x_usb_setup(); else BUG(); }
arch/mips/include/asm/mach-ath79/ar71xx_regs.h +7 −0 Original line number Diff line number Diff line Loading @@ -63,6 +63,8 @@ #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) #define AR934X_WMAC_SIZE 0x20000 #define AR934X_EHCI_BASE 0x1b000000 #define AR934X_EHCI_SIZE 0x200 /* * DDR_CTRL block Loading Loading @@ -288,6 +290,11 @@ #define AR933X_RESET_USB_PHY BIT(4) #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) #define AR934X_RESET_USB_PHY_ANALOG BIT(11) #define AR934X_RESET_USB_HOST BIT(5) #define AR934X_RESET_USB_PHY BIT(4) #define AR934X_RESET_USBSUS_OVERRIDE BIT(3) #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) Loading