Loading arch/arm/mach-mx5/mm.c +0 −5 Original line number Diff line number Diff line Loading @@ -49,11 +49,6 @@ static struct map_desc mxc_io_desc[] __initdata = { .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR), .length = MX51_AIPS2_SIZE, .type = MT_DEVICE }, { .virtual = MX51_NFC_AXI_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(MX51_NFC_AXI_BASE_ADDR), .length = MX51_NFC_AXI_SIZE, .type = MT_DEVICE }, }; Loading arch/arm/plat-mxc/include/mach/mx51.h +2 −7 Original line number Diff line number Diff line Loading @@ -23,7 +23,7 @@ * C8000000 64M CS3 Flash * CC000000 32M CS4 SRAM * CE000000 32M CS5 SRAM * F9000000 CFFF0000 64K NFC (NAND Flash AXI) * CFFF0000 64K NFC (NAND Flash AXI) * */ Loading @@ -46,7 +46,6 @@ * NFC */ #define MX51_NFC_AXI_BASE_ADDR 0xCFFF0000 /* NAND flash AXI */ #define MX51_NFC_AXI_BASE_ADDR_VIRT 0xF9000000 #define MX51_NFC_AXI_SIZE SZ_64K /* Loading Loading @@ -241,7 +240,6 @@ MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, NFC_AXI) ? MX51_NFC_AXI_IO_ADDRESS(x) : \ 0xDEADBEEF) /* Loading @@ -262,9 +260,6 @@ #define MX51_AIPS2_IO_ADDRESS(x) \ (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT) #define MX51_NFC_AXI_IO_ADDRESS(x) \ (((x) - MX51_NFC_AXI_BASE_ADDR) + MX51_NFC_AXI_BASE_ADDR_VIRT) #define MX51_IS_MEM_DEVICE_NONSHARED(x) 0 /* Loading Loading
arch/arm/mach-mx5/mm.c +0 −5 Original line number Diff line number Diff line Loading @@ -49,11 +49,6 @@ static struct map_desc mxc_io_desc[] __initdata = { .pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR), .length = MX51_AIPS2_SIZE, .type = MT_DEVICE }, { .virtual = MX51_NFC_AXI_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(MX51_NFC_AXI_BASE_ADDR), .length = MX51_NFC_AXI_SIZE, .type = MT_DEVICE }, }; Loading
arch/arm/plat-mxc/include/mach/mx51.h +2 −7 Original line number Diff line number Diff line Loading @@ -23,7 +23,7 @@ * C8000000 64M CS3 Flash * CC000000 32M CS4 SRAM * CE000000 32M CS5 SRAM * F9000000 CFFF0000 64K NFC (NAND Flash AXI) * CFFF0000 64K NFC (NAND Flash AXI) * */ Loading @@ -46,7 +46,6 @@ * NFC */ #define MX51_NFC_AXI_BASE_ADDR 0xCFFF0000 /* NAND flash AXI */ #define MX51_NFC_AXI_BASE_ADDR_VIRT 0xF9000000 #define MX51_NFC_AXI_SIZE SZ_64K /* Loading Loading @@ -241,7 +240,6 @@ MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \ MX51_IS_MODULE(x, NFC_AXI) ? MX51_NFC_AXI_IO_ADDRESS(x) : \ 0xDEADBEEF) /* Loading @@ -262,9 +260,6 @@ #define MX51_AIPS2_IO_ADDRESS(x) \ (((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT) #define MX51_NFC_AXI_IO_ADDRESS(x) \ (((x) - MX51_NFC_AXI_BASE_ADDR) + MX51_NFC_AXI_BASE_ADDR_VIRT) #define MX51_IS_MEM_DEVICE_NONSHARED(x) 0 /* Loading