Loading arch/arm/plat-omap/dma.c +12 −6 Original line number Diff line number Diff line Loading @@ -501,7 +501,8 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) burst = 0x2; break; } /* not supported by current hardware on OMAP1 /* * not supported by current hardware on OMAP1 * w |= (0x03 << 7); * fall through */ Loading @@ -510,7 +511,8 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) burst = 0x3; break; } /* OMAP1 don't support burst 16 /* * OMAP1 don't support burst 16 * fall through */ default: Loading Loading @@ -604,7 +606,8 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) burst = 0x3; break; } /* OMAP1 don't support burst 16 /* * OMAP1 don't support burst 16 * fall through */ default: Loading Loading @@ -1285,8 +1288,10 @@ int omap_request_dma_chain(int dev_id, const char *dev_name, return -EINVAL; } /* Allocate a queue to maintain the status of the channels * in the chain */ /* * Allocate a queue to maintain the status of the channels * in the chain */ channels = kmalloc(sizeof(*channels) * no_of_chans, GFP_KERNEL); if (channels == NULL) { printk(KERN_ERR "omap_dma: No memory for channel queue\n"); Loading Loading @@ -1915,7 +1920,8 @@ static int omap2_dma_handle_ch(int ch) printk(KERN_INFO "DMA transaction error with device %d\n", dma_chan[ch].dev_id); if (cpu_class_is_omap2()) { /* Errata: sDMA Channel is not disabled /* * Errata: sDMA Channel is not disabled * after a transaction error. So we explicitely * disable the channel */ Loading Loading
arch/arm/plat-omap/dma.c +12 −6 Original line number Diff line number Diff line Loading @@ -501,7 +501,8 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) burst = 0x2; break; } /* not supported by current hardware on OMAP1 /* * not supported by current hardware on OMAP1 * w |= (0x03 << 7); * fall through */ Loading @@ -510,7 +511,8 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) burst = 0x3; break; } /* OMAP1 don't support burst 16 /* * OMAP1 don't support burst 16 * fall through */ default: Loading Loading @@ -604,7 +606,8 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) burst = 0x3; break; } /* OMAP1 don't support burst 16 /* * OMAP1 don't support burst 16 * fall through */ default: Loading Loading @@ -1285,8 +1288,10 @@ int omap_request_dma_chain(int dev_id, const char *dev_name, return -EINVAL; } /* Allocate a queue to maintain the status of the channels * in the chain */ /* * Allocate a queue to maintain the status of the channels * in the chain */ channels = kmalloc(sizeof(*channels) * no_of_chans, GFP_KERNEL); if (channels == NULL) { printk(KERN_ERR "omap_dma: No memory for channel queue\n"); Loading Loading @@ -1915,7 +1920,8 @@ static int omap2_dma_handle_ch(int ch) printk(KERN_INFO "DMA transaction error with device %d\n", dma_chan[ch].dev_id); if (cpu_class_is_omap2()) { /* Errata: sDMA Channel is not disabled /* * Errata: sDMA Channel is not disabled * after a transaction error. So we explicitely * disable the channel */ Loading