Commit e64aae82 authored by Jaehoon Chung's avatar Jaehoon Chung Committed by Ulf Hansson
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mmc: sdhci-s3c: use the bitops API for bit operation 



Use the bitops API instead of shifting directly.

Signed-off-by: default avatarJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 57f83245

drivers/mmc/host/sdhci-s3c.c

+21 −20
Original line number Diff line number Diff line
@@ -37,10 +37,10 @@ 
#define S3C_SDHCI_CONTROL3			(0x84)

#define S3C64XX_SDHCI_CONTROL4			(0x8C)



#define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR	(1 << 31)

#define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK		(1 << 30)

#define S3C_SDHCI_CTRL2_CDINVRXD3		(1 << 29)

#define S3C_SDHCI_CTRL2_SLCARDOUT		(1 << 28)

#define S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR	BIT(31)

#define S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK		BIT(30)

#define S3C_SDHCI_CTRL2_CDINVRXD3		BIT(29)

#define S3C_SDHCI_CTRL2_SLCARDOUT		BIT(28)



#define S3C_SDHCI_CTRL2_FLTCLKSEL_MASK		(0xf << 24)

#define S3C_SDHCI_CTRL2_FLTCLKSEL_SHIFT		(24)
@@ -50,11 +50,11 @@ 
#define S3C_SDHCI_CTRL2_LVLDAT_SHIFT		(16)

#define S3C_SDHCI_CTRL2_LVLDAT(_x)		((_x) << 16)



#define S3C_SDHCI_CTRL2_ENFBCLKTX		(1 << 15)

#define S3C_SDHCI_CTRL2_ENFBCLKRX		(1 << 14)

#define S3C_SDHCI_CTRL2_SDCDSEL			(1 << 13)

#define S3C_SDHCI_CTRL2_SDSIGPC			(1 << 12)

#define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART	(1 << 11)

#define S3C_SDHCI_CTRL2_ENFBCLKTX		BIT(15)

#define S3C_SDHCI_CTRL2_ENFBCLKRX		BIT(14)

#define S3C_SDHCI_CTRL2_SDCDSEL			BIT(13)

#define S3C_SDHCI_CTRL2_SDSIGPC			BIT(12)

#define S3C_SDHCI_CTRL2_ENBUSYCHKTXSTART	BIT(11)



#define S3C_SDHCI_CTRL2_DFCNT_MASK		(0x3 << 9)

#define S3C_SDHCI_CTRL2_DFCNT_SHIFT		(9)
@@ -63,19 +63,20 @@ 
#define S3C_SDHCI_CTRL2_DFCNT_16SDCLK		(0x2 << 9)

#define S3C_SDHCI_CTRL2_DFCNT_64SDCLK		(0x3 << 9)



#define S3C_SDHCI_CTRL2_ENCLKOUTHOLD		(1 << 8)

#define S3C_SDHCI_CTRL2_RWAITMODE		(1 << 7)

#define S3C_SDHCI_CTRL2_DISBUFRD		(1 << 6)

#define S3C_SDHCI_CTRL2_ENCLKOUTHOLD		BIT(8)

#define S3C_SDHCI_CTRL2_RWAITMODE		BIT(7)

#define S3C_SDHCI_CTRL2_DISBUFRD		BIT(6)



#define S3C_SDHCI_CTRL2_SELBASECLK_MASK		(0x3 << 4)

#define S3C_SDHCI_CTRL2_SELBASECLK_SHIFT	(4)

#define S3C_SDHCI_CTRL2_PWRSYNC			(1 << 3)

#define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON		(1 << 1)

#define S3C_SDHCI_CTRL2_HWINITFIN		(1 << 0)



#define S3C_SDHCI_CTRL3_FCSEL3			(1 << 31)

#define S3C_SDHCI_CTRL3_FCSEL2			(1 << 23)

#define S3C_SDHCI_CTRL3_FCSEL1			(1 << 15)

#define S3C_SDHCI_CTRL3_FCSEL0			(1 << 7)

#define S3C_SDHCI_CTRL2_PWRSYNC			BIT(3)

#define S3C_SDHCI_CTRL2_ENCLKOUTMSKCON		BIT(1)

#define S3C_SDHCI_CTRL2_HWINITFIN		BIT(0)



#define S3C_SDHCI_CTRL3_FCSEL3			BIT(31)

#define S3C_SDHCI_CTRL3_FCSEL2			BIT(23)

#define S3C_SDHCI_CTRL3_FCSEL1			BIT(15)

#define S3C_SDHCI_CTRL3_FCSEL0			BIT(7)



#define S3C_SDHCI_CTRL3_FIA3_MASK		(0x7f << 24)

#define S3C_SDHCI_CTRL3_FIA3_SHIFT		(24)