Loading arch/powerpc/boot/dts/ksi8560.dts +13 −0 Original line number Diff line number Diff line Loading @@ -56,6 +56,19 @@ soc@fdf00000 { ranges = <0x00000000 0xfdf00000 0x00100000>; bus-frequency = <0>; /* Fixed by bootwrapper */ ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <8>; }; ecm@1000 { compatible = "fsl,mpc8560-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; Loading arch/powerpc/boot/dts/mpc8536ds.dts +13 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,19 @@ soc@ffe00000 { reg = <0xffe00000 0x1000>; bus-frequency = <0>; // Filled out by uboot. ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <12>; }; ecm@1000 { compatible = "fsl,mpc8536-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,mpc8536-memory-controller"; reg = <0x2000 0x1000>; Loading arch/powerpc/boot/dts/mpc8540ads.dts +13 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,19 @@ soc8540@e0000000 { reg = <0xe0000000 0x100000>; // CCSRBAR 1M bus-frequency = <0>; ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <8>; }; ecm@1000 { compatible = "fsl,mpc8540-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,8540-memory-controller"; reg = <0x2000 0x1000>; Loading arch/powerpc/boot/dts/mpc8541cds.dts +13 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,19 @@ soc8541@e0000000 { reg = <0xe0000000 0x1000>; // CCSRBAR 1M bus-frequency = <0>; ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <8>; }; ecm@1000 { compatible = "fsl,mpc8541-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,8541-memory-controller"; reg = <0x2000 0x1000>; Loading arch/powerpc/boot/dts/mpc8544ds.dts +13 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,19 @@ soc8544@e0000000 { reg = <0xe0000000 0x1000>; // CCSRBAR 1M bus-frequency = <0>; // Filled out by uboot. ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <10>; }; ecm@1000 { compatible = "fsl,mpc8544-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,8544-memory-controller"; reg = <0x2000 0x1000>; Loading Loading
arch/powerpc/boot/dts/ksi8560.dts +13 −0 Original line number Diff line number Diff line Loading @@ -56,6 +56,19 @@ soc@fdf00000 { ranges = <0x00000000 0xfdf00000 0x00100000>; bus-frequency = <0>; /* Fixed by bootwrapper */ ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <8>; }; ecm@1000 { compatible = "fsl,mpc8560-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,mpc8540-memory-controller"; reg = <0x2000 0x1000>; Loading
arch/powerpc/boot/dts/mpc8536ds.dts +13 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,19 @@ soc@ffe00000 { reg = <0xffe00000 0x1000>; bus-frequency = <0>; // Filled out by uboot. ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <12>; }; ecm@1000 { compatible = "fsl,mpc8536-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,mpc8536-memory-controller"; reg = <0x2000 0x1000>; Loading
arch/powerpc/boot/dts/mpc8540ads.dts +13 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,19 @@ soc8540@e0000000 { reg = <0xe0000000 0x100000>; // CCSRBAR 1M bus-frequency = <0>; ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <8>; }; ecm@1000 { compatible = "fsl,mpc8540-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,8540-memory-controller"; reg = <0x2000 0x1000>; Loading
arch/powerpc/boot/dts/mpc8541cds.dts +13 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,19 @@ soc8541@e0000000 { reg = <0xe0000000 0x1000>; // CCSRBAR 1M bus-frequency = <0>; ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <8>; }; ecm@1000 { compatible = "fsl,mpc8541-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,8541-memory-controller"; reg = <0x2000 0x1000>; Loading
arch/powerpc/boot/dts/mpc8544ds.dts +13 −0 Original line number Diff line number Diff line Loading @@ -60,6 +60,19 @@ soc8544@e0000000 { reg = <0xe0000000 0x1000>; // CCSRBAR 1M bus-frequency = <0>; // Filled out by uboot. ecm-law@0 { compatible = "fsl,ecm-law"; reg = <0x0 0x1000>; fsl,num-laws = <10>; }; ecm@1000 { compatible = "fsl,mpc8544-ecm", "fsl,ecm"; reg = <0x1000 0x1000>; interrupts = <17 2>; interrupt-parent = <&mpic>; }; memory-controller@2000 { compatible = "fsl,8544-memory-controller"; reg = <0x2000 0x1000>; Loading