Loading include/dt-bindings/clock/axg-clkc.h +1 −0 Original line number Diff line number Diff line Loading @@ -71,5 +71,6 @@ #define CLKID_PCIE_CML_EN0 79 #define CLKID_PCIE_CML_EN1 80 #define CLKID_MIPI_ENABLE 81 #define CLKID_GEN_CLK 84 #endif /* __AXG_CLKC_H */ include/dt-bindings/clock/gxbb-clkc.h +1 −0 Original line number Diff line number Diff line Loading @@ -127,5 +127,6 @@ #define CLKID_VAPB 140 #define CLKID_VDEC_1 153 #define CLKID_VDEC_HEVC 156 #define CLKID_GEN_CLK 159 #endif /* __GXBB_CLKC_H */ Loading
include/dt-bindings/clock/axg-clkc.h +1 −0 Original line number Diff line number Diff line Loading @@ -71,5 +71,6 @@ #define CLKID_PCIE_CML_EN0 79 #define CLKID_PCIE_CML_EN1 80 #define CLKID_MIPI_ENABLE 81 #define CLKID_GEN_CLK 84 #endif /* __AXG_CLKC_H */
include/dt-bindings/clock/gxbb-clkc.h +1 −0 Original line number Diff line number Diff line Loading @@ -127,5 +127,6 @@ #define CLKID_VAPB 140 #define CLKID_VDEC_1 153 #define CLKID_VDEC_HEVC 156 #define CLKID_GEN_CLK 159 #endif /* __GXBB_CLKC_H */