Merge remote-tracking branch 'arm-soc/at91/base2+cleanup' into cleanup-base (d50673ed) · Commits · 方亚芬 / linux

Documentation/feature-removal-schedule.txt

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		@@ -510,17 +510,3 @@ Why: The pci_scan_bus_parented() interface creates a new root bus. The
		convert to using pci_scan_root_bus() so they can supply a list of
		bus resources when the bus is created.
		Who: Bjorn Helgaas <bhelgaas@google.com>

		----------------------------

		What: The CAP9 SoC family will be removed
		When: 3.4
		Files: arch/arm/mach-at91/at91cap9.c
		arch/arm/mach-at91/at91cap9_devices.c
		arch/arm/mach-at91/include/mach/at91cap9.h
		arch/arm/mach-at91/include/mach/at91cap9_matrix.h
		arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
		arch/arm/mach-at91/board-cap9adk.c
		Why: The code is not actively maintained and platforms are now hard to find.
		Who: Nicolas Ferre <nicolas.ferre@atmel.com>
		Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

arch/arm/Kconfig

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		@@ -327,7 +327,7 @@ config ARCH_AT91
		select CLKDEV_LOOKUP
		help
		This enables support for systems based on the Atmel AT91RM9200,
		AT91SAM9 and AT91CAP9 processors.
		AT91SAM9 processors.

		config ARCH_BCMRING
		bool "Broadcom BCMRING"

arch/arm/Kconfig.debug

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		@@ -86,7 +86,7 @@ choice
		depends on HAVE_AT91_DBGU0

		config AT91_DEBUG_LL_DBGU1
		bool "Kernel low-level debugging on 9263, 9g45 and cap9"
		bool "Kernel low-level debugging on 9263 and 9g45"
		depends on HAVE_AT91_DBGU1

		config DEBUG_CLPS711X_UART1

arch/arm/boot/dts/at91sam9g25ek.dts

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		/*
		* at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
		*
		* Copyright (C) 2012 Atmel,
		* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
		*
		* Licensed under GPLv2 or later.
		*/
		/dts-v1/;
		/include/ "at91sam9x5.dtsi"
		/include/ "at91sam9x5cm.dtsi"

		/ {
		model = "Atmel AT91SAM9G25-EK";
		compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";

		chosen {
		bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
		};

		ahb {
		apb {
		dbgu: serial@fffff200 {
		status = "okay";
		};

		usart0: serial@f801c000 {
		status = "okay";
		};

		macb0: ethernet@f802c000 {
		phy-mode = "rmii";
		status = "okay";
		};
		};
		};
		};

arch/arm/boot/dts/at91sam9x5.dtsi

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		/*
		* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
		* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
		* AT91SAM9X25, AT91SAM9X35 SoC
		*
		* Copyright (C) 2012 Atmel,
		* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
		*
		* Licensed under GPLv2 or later.
		*/

		/include/ "skeleton.dtsi"

		/ {
		model = "Atmel AT91SAM9x5 family SoC";
		compatible = "atmel,at91sam9x5";
		interrupt-parent = <&aic>;

		aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		};
		cpus {
		cpu@0 {
		compatible = "arm,arm926ejs";
		};
		};

		memory@20000000 {
		reg = <0x20000000 0x10000000>;
		};

		ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		aic: interrupt-controller@fffff000 {
		#interrupt-cells = <2>;
		compatible = "atmel,at91rm9200-aic";
		interrupt-controller;
		interrupt-parent;
		reg = <0xfffff000 0x200>;
		};

		pit: timer@fffffe30 {
		compatible = "atmel,at91sam9260-pit";
		reg = <0xfffffe30 0xf>;
		interrupts = <1 4>;
		};

		tcb0: timer@f8008000 {
		compatible = "atmel,at91sam9x5-tcb";
		reg = <0xf8008000 0x100>;
		interrupts = <17 4>;
		};

		tcb1: timer@f800c000 {
		compatible = "atmel,at91sam9x5-tcb";
		reg = <0xf800c000 0x100>;
		interrupts = <17 4>;
		};

		dma0: dma-controller@ffffec00 {
		compatible = "atmel,at91sam9g45-dma";
		reg = <0xffffec00 0x200>;
		interrupts = <20 4>;
		};

		dma1: dma-controller@ffffee00 {
		compatible = "atmel,at91sam9g45-dma";
		reg = <0xffffee00 0x200>;
		interrupts = <21 4>;
		};

		pioA: gpio@fffff400 {
		compatible = "atmel,at91rm9200-gpio";
		reg = <0xfffff400 0x100>;
		interrupts = <2 4>;
		#gpio-cells = <2>;
		gpio-controller;
		};

		pioB: gpio@fffff600 {
		compatible = "atmel,at91rm9200-gpio";
		reg = <0xfffff600 0x100>;
		interrupts = <2 4>;
		#gpio-cells = <2>;
		gpio-controller;
		};

		pioC: gpio@fffff800 {
		compatible = "atmel,at91rm9200-gpio";
		reg = <0xfffff800 0x100>;
		interrupts = <3 4>;
		#gpio-cells = <2>;
		gpio-controller;
		};

		pioD: gpio@fffffa00 {
		compatible = "atmel,at91rm9200-gpio";
		reg = <0xfffffa00 0x100>;
		interrupts = <3 4>;
		#gpio-cells = <2>;
		gpio-controller;
		};

		dbgu: serial@fffff200 {
		compatible = "atmel,at91sam9260-usart";
		reg = <0xfffff200 0x200>;
		interrupts = <1 4>;
		status = "disabled";
		};

		usart0: serial@f801c000 {
		compatible = "atmel,at91sam9260-usart";
		reg = <0xf801c000 0x200>;
		interrupts = <5 4>;
		atmel,use-dma-rx;
		atmel,use-dma-tx;
		status = "disabled";
		};

		usart1: serial@f8020000 {
		compatible = "atmel,at91sam9260-usart";
		reg = <0xf8020000 0x200>;
		interrupts = <6 4>;
		atmel,use-dma-rx;
		atmel,use-dma-tx;
		status = "disabled";
		};

		usart2: serial@f8024000 {
		compatible = "atmel,at91sam9260-usart";
		reg = <0xf8024000 0x200>;
		interrupts = <7 4>;
		atmel,use-dma-rx;
		atmel,use-dma-tx;
		status = "disabled";
		};

		macb0: ethernet@f802c000 {
		compatible = "cdns,at32ap7000-macb", "cdns,macb";
		reg = <0xf802c000 0x100>;
		interrupts = <24 4>;
		status = "disabled";
		};

		macb1: ethernet@f8030000 {
		compatible = "cdns,at32ap7000-macb", "cdns,macb";
		reg = <0xf8030000 0x100>;
		interrupts = <27 4>;
		status = "disabled";
		};
		};
		};
		};