Commit cec822f8 authored by Andrew Jeffery's avatar Andrew Jeffery Committed by Joel Stanley
Browse files

ARM: dts: aspeed-g5: Add LPC Controller node 



Signed-off-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent daf04258

arch/arm/boot/dts/aspeed-g5.dtsi

+31 −0
Original line number Diff line number Diff line
@@ -92,6 +92,7 @@ timer: timer@1e782000 { 
				clocks = <&clk_apb>;

			};





			wdt1: wdt@1e785000 {

				compatible = "aspeed,wdt";

				reg = <0x1e785000 0x1c>;
@@ -121,6 +122,36 @@ uart1: serial@1e783000 { 
				status = "disabled";

			};



			lpc: lpc@1e789000 {

				compatible = "aspeed,ast2500-lpc", "simple-mfd";

				reg = <0x1e789000 0x1000>;



				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0 0x1e789000 0x1000>;



				lpc_bmc: lpc-bmc@0 {

					compatible = "aspeed,ast2500-lpc-bmc";

					reg = <0x0 0x80>;

				};



				lpc_host: lpc-host@80 {

					compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";

					reg = <0x80 0x1e0>;



					#address-cells = <1>;

					#size-cells = <1>;

					ranges = <0 0x80 0x1e0>;



					reg-io-width = <4>;



					lhc: lhc@20 {

						compatible = "aspeed,ast2500-lhc";

						reg = <0x20 0x24 0x48 0x8>;

					};

				};

			};



			uart2: serial@1e78d000 {

				compatible = "ns16550a";

				reg = <0x1e78d000 0x1000>;