Loading drivers/gpu/drm/nouveau/core/engine/device/base.c +1 −1 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ static const u64 disable_map[] = { [NVDEV_ENGINE_PPP] = NV_DEVICE_DISABLE_PPP, [NVDEV_ENGINE_COPY0] = NV_DEVICE_DISABLE_COPY0, [NVDEV_ENGINE_COPY1] = NV_DEVICE_DISABLE_COPY1, [NVDEV_ENGINE_UNK1C1] = NV_DEVICE_DISABLE_UNK1C1, [NVDEV_ENGINE_VIC] = NV_DEVICE_DISABLE_VIC, [NVDEV_ENGINE_VENC] = NV_DEVICE_DISABLE_VENC, [NVDEV_ENGINE_DISP] = NV_DEVICE_DISABLE_DISP, [NVDEV_SUBDEV_NR] = 0, Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c +3 −3 Original line number Diff line number Diff line Loading @@ -144,7 +144,7 @@ nv84_fifo_object_attach(struct nouveau_object *parent, case NVDEV_ENGINE_COPY0 : context |= 0x00300000; break; case NVDEV_ENGINE_VP : context |= 0x00400000; break; case NVDEV_ENGINE_CRYPT : case NVDEV_ENGINE_UNK1C1: context |= 0x00500000; break; case NVDEV_ENGINE_VIC : context |= 0x00500000; break; case NVDEV_ENGINE_BSP : context |= 0x00600000; break; default: return -EINVAL; Loading Loading @@ -180,7 +180,7 @@ nv84_fifo_chan_ctor_dma(struct nouveau_object *parent, (1ULL << NVDEV_ENGINE_BSP) | (1ULL << NVDEV_ENGINE_PPP) | (1ULL << NVDEV_ENGINE_COPY0) | (1ULL << NVDEV_ENGINE_UNK1C1), &chan); (1ULL << NVDEV_ENGINE_VIC), &chan); *pobject = nv_object(chan); if (ret) return ret; Loading Loading @@ -243,7 +243,7 @@ nv84_fifo_chan_ctor_ind(struct nouveau_object *parent, (1ULL << NVDEV_ENGINE_BSP) | (1ULL << NVDEV_ENGINE_PPP) | (1ULL << NVDEV_ENGINE_COPY0) | (1ULL << NVDEV_ENGINE_UNK1C1), &chan); (1ULL << NVDEV_ENGINE_VIC), &chan); *pobject = nv_object(chan); if (ret) return ret; Loading drivers/gpu/drm/nouveau/core/include/core/class.h +1 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ #define NV_DEVICE_DISABLE_PPP 0x0000004000000000ULL #define NV_DEVICE_DISABLE_COPY0 0x0000008000000000ULL #define NV_DEVICE_DISABLE_COPY1 0x0000010000000000ULL #define NV_DEVICE_DISABLE_UNK1C1 0x0000020000000000ULL #define NV_DEVICE_DISABLE_VIC 0x0000020000000000ULL #define NV_DEVICE_DISABLE_VENC 0x0000040000000000ULL struct nv_device_class { Loading drivers/gpu/drm/nouveau/core/include/core/device.h +1 −1 Original line number Diff line number Diff line Loading @@ -50,7 +50,7 @@ enum nv_subdev_type { NVDEV_ENGINE_COPY0, NVDEV_ENGINE_COPY1, NVDEV_ENGINE_COPY2, NVDEV_ENGINE_UNK1C1, NVDEV_ENGINE_VIC, NVDEV_ENGINE_VENC, NVDEV_ENGINE_DISP, Loading Loading
drivers/gpu/drm/nouveau/core/engine/device/base.c +1 −1 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ static const u64 disable_map[] = { [NVDEV_ENGINE_PPP] = NV_DEVICE_DISABLE_PPP, [NVDEV_ENGINE_COPY0] = NV_DEVICE_DISABLE_COPY0, [NVDEV_ENGINE_COPY1] = NV_DEVICE_DISABLE_COPY1, [NVDEV_ENGINE_UNK1C1] = NV_DEVICE_DISABLE_UNK1C1, [NVDEV_ENGINE_VIC] = NV_DEVICE_DISABLE_VIC, [NVDEV_ENGINE_VENC] = NV_DEVICE_DISABLE_VENC, [NVDEV_ENGINE_DISP] = NV_DEVICE_DISABLE_DISP, [NVDEV_SUBDEV_NR] = 0, Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c +3 −3 Original line number Diff line number Diff line Loading @@ -144,7 +144,7 @@ nv84_fifo_object_attach(struct nouveau_object *parent, case NVDEV_ENGINE_COPY0 : context |= 0x00300000; break; case NVDEV_ENGINE_VP : context |= 0x00400000; break; case NVDEV_ENGINE_CRYPT : case NVDEV_ENGINE_UNK1C1: context |= 0x00500000; break; case NVDEV_ENGINE_VIC : context |= 0x00500000; break; case NVDEV_ENGINE_BSP : context |= 0x00600000; break; default: return -EINVAL; Loading Loading @@ -180,7 +180,7 @@ nv84_fifo_chan_ctor_dma(struct nouveau_object *parent, (1ULL << NVDEV_ENGINE_BSP) | (1ULL << NVDEV_ENGINE_PPP) | (1ULL << NVDEV_ENGINE_COPY0) | (1ULL << NVDEV_ENGINE_UNK1C1), &chan); (1ULL << NVDEV_ENGINE_VIC), &chan); *pobject = nv_object(chan); if (ret) return ret; Loading Loading @@ -243,7 +243,7 @@ nv84_fifo_chan_ctor_ind(struct nouveau_object *parent, (1ULL << NVDEV_ENGINE_BSP) | (1ULL << NVDEV_ENGINE_PPP) | (1ULL << NVDEV_ENGINE_COPY0) | (1ULL << NVDEV_ENGINE_UNK1C1), &chan); (1ULL << NVDEV_ENGINE_VIC), &chan); *pobject = nv_object(chan); if (ret) return ret; Loading
drivers/gpu/drm/nouveau/core/include/core/class.h +1 −1 Original line number Diff line number Diff line Loading @@ -22,7 +22,7 @@ #define NV_DEVICE_DISABLE_PPP 0x0000004000000000ULL #define NV_DEVICE_DISABLE_COPY0 0x0000008000000000ULL #define NV_DEVICE_DISABLE_COPY1 0x0000010000000000ULL #define NV_DEVICE_DISABLE_UNK1C1 0x0000020000000000ULL #define NV_DEVICE_DISABLE_VIC 0x0000020000000000ULL #define NV_DEVICE_DISABLE_VENC 0x0000040000000000ULL struct nv_device_class { Loading
drivers/gpu/drm/nouveau/core/include/core/device.h +1 −1 Original line number Diff line number Diff line Loading @@ -50,7 +50,7 @@ enum nv_subdev_type { NVDEV_ENGINE_COPY0, NVDEV_ENGINE_COPY1, NVDEV_ENGINE_COPY2, NVDEV_ENGINE_UNK1C1, NVDEV_ENGINE_VIC, NVDEV_ENGINE_VENC, NVDEV_ENGINE_DISP, Loading