Commit c113ea1c authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: rework sdma structures 



Rework the sdma structures in the driver to
consolidate all of the sdma info into a single
structure and allow for asics that may have
different numbers of sdma instances.

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 756e6880

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+14 −8
Original line number Diff line number Diff line
@@ -1708,7 +1708,7 @@ struct amdgpu_vce { 
/*

 * SDMA

 */

struct amdgpu_sdma {

struct amdgpu_sdma_instance {

	/* SDMA firmware */

	const struct firmware	*fw;

	uint32_t		fw_version;
@@ -1718,6 +1718,13 @@ struct amdgpu_sdma { 
	bool			burst_nop;

};



struct amdgpu_sdma {

	struct amdgpu_sdma_instance instance[AMDGPU_MAX_SDMA_INSTANCES];

	struct amdgpu_irq_src	trap_irq;

	struct amdgpu_irq_src	illegal_inst_irq;

	int 			num_instances;

};



/*

 * Firmware

 */
@@ -2064,9 +2071,7 @@ struct amdgpu_device { 
	struct amdgpu_gfx		gfx;



	/* sdma */

	struct amdgpu_sdma		sdma[AMDGPU_MAX_SDMA_INSTANCES];

	struct amdgpu_irq_src		sdma_trap_irq;

	struct amdgpu_irq_src		sdma_illegal_inst_irq;

	struct amdgpu_sdma		sdma;



	/* uvd */

	bool				has_uvd;
@@ -2203,17 +2208,18 @@ static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v) 
	ring->ring_free_dw--;

}



static inline struct amdgpu_sdma * amdgpu_get_sdma_instance(struct amdgpu_ring *ring)

static inline struct amdgpu_sdma_instance *

amdgpu_get_sdma_instance(struct amdgpu_ring *ring)

{

	struct amdgpu_device *adev = ring->adev;

	int i;



	for (i = 0; i < AMDGPU_MAX_SDMA_INSTANCES; i++)

		if (&adev->sdma[i].ring == ring)

	for (i = 0; i < adev->sdma.num_instances; i++)

		if (&adev->sdma.instance[i].ring == ring)

			break;



	if (i < AMDGPU_MAX_SDMA_INSTANCES)

		return &adev->sdma[i];

		return &adev->sdma.instance[i];

	else

		return NULL;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

+2 −2
Original line number Diff line number Diff line
@@ -649,12 +649,12 @@ static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type) 


	case KGD_ENGINE_SDMA1:

		hdr = (const union amdgpu_firmware_header *)

							adev->sdma[0].fw->data;

							adev->sdma.instance[0].fw->data;

		break;



	case KGD_ENGINE_SDMA2:

		hdr = (const union amdgpu_firmware_header *)

							adev->sdma[1].fw->data;

							adev->sdma.instance[1].fw->data;

		break;



	default:

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

+2 −2
Original line number Diff line number Diff line
@@ -523,12 +523,12 @@ static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type) 


	case KGD_ENGINE_SDMA1:

		hdr = (const union amdgpu_firmware_header *)

							adev->sdma[0].fw->data;

							adev->sdma.instance[0].fw->data;

		break;



	case KGD_ENGINE_SDMA2:

		hdr = (const union amdgpu_firmware_header *)

							adev->sdma[1].fw->data;

							adev->sdma.instance[1].fw->data;

		break;



	default:

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+4 −3
Original line number Diff line number Diff line
@@ -104,10 +104,11 @@ int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type, 
		}

		break;

	case AMDGPU_HW_IP_DMA:

		if (ring < 2) {

			*out_ring = &adev->sdma[ring].ring;

		if (ring < adev->sdma.num_instances) {

			*out_ring = &adev->sdma.instance[ring].ring;

		} else {

			DRM_ERROR("only two SDMA rings are supported\n");

			DRM_ERROR("only %d SDMA rings are supported\n",

				  adev->sdma.num_instances);

			return -EINVAL;

		}

		break;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+5 −5
Original line number Diff line number Diff line
@@ -218,8 +218,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
			break;

		case AMDGPU_HW_IP_DMA:

			type = AMD_IP_BLOCK_TYPE_SDMA;

			ring_mask = adev->sdma[0].ring.ready ? 1 : 0;

			ring_mask |= ((adev->sdma[1].ring.ready ? 1 : 0) << 1);

			for (i = 0; i < adev->sdma.num_instances; i++)

				ring_mask |= ((adev->sdma.instance[i].ring.ready ? 1 : 0) << i);

			ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;

			ib_size_alignment = 1;

			break;
@@ -341,10 +341,10 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
			fw_info.feature = 0;

			break;

		case AMDGPU_INFO_FW_SDMA:

			if (info->query_fw.index >= 2)

			if (info->query_fw.index >= adev->sdma.num_instances)

				return -EINVAL;

			fw_info.ver = adev->sdma[info->query_fw.index].fw_version;

			fw_info.feature = adev->sdma[info->query_fw.index].feature_version;

			fw_info.ver = adev->sdma.instance[info->query_fw.index].fw_version;

			fw_info.feature = adev->sdma.instance[info->query_fw.index].feature_version;

			break;

		default:

			return -EINVAL;