Commit b26d851f authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

tile: Use SPARSE_IRQ



Get rid of the private allocator and switch over to sparse IRQs.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarGrant Likely <grant.likely@linaro.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Acked-by: default avatarChris Metcalf <cmetcalf@tilera.com>
Link: http://lkml.kernel.org/r/20140507154338.423715783@linutronix.de


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 2aa799d8
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -125,6 +125,8 @@ config HVC_TILE

config TILEGX
	bool "Building for TILE-Gx (64-bit) processor"
	select SPARSE_IRQ
	select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
	select HAVE_FUNCTION_TRACER
	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
	select HAVE_FUNCTION_GRAPH_TRACER
+4 −5
Original line number Diff line number Diff line
@@ -22,6 +22,8 @@

/* IRQ numbers used for linux IPIs. */
#define IRQ_RESCHEDULE	0
/* Interrupts for dynamic allocation start at 1. Let the core allocate irq0 */
#define NR_IRQS_LEGACY	1

#define irq_canonicalize(irq)   (irq)

@@ -76,7 +78,4 @@ void tile_irq_activate(unsigned int irq, int tile_irq_type);

void setup_irq_regs(void);

unsigned int irq_alloc_hwirq(int node);
void irq_free_hwirq(unsigned int irq);

#endif /* _ASM_TILE_IRQ_H */
+3 −49
Original line number Diff line number Diff line
@@ -54,13 +54,6 @@ static DEFINE_PER_CPU(unsigned long, irq_disable_mask)
 */
static DEFINE_PER_CPU(int, irq_depth);

/* State for allocating IRQs on Gx. */
#if CHIP_HAS_IPI()
static unsigned long available_irqs = ((1UL << NR_IRQS) - 1) &
				      (~(1UL << IRQ_RESCHEDULE));
static DEFINE_SPINLOCK(available_irqs_lock);
#endif

#if CHIP_HAS_IPI()
/* Use SPRs to manipulate device interrupts. */
#define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_K, irq_mask)
@@ -278,50 +271,11 @@ int arch_show_interrupts(struct seq_file *p, int prec)
	return 0;
}

/*
 * Generic, controller-independent functions:
 */

#if CHIP_HAS_IPI()
int create_irq(void)
{
	unsigned long flags;
	int result;

	spin_lock_irqsave(&available_irqs_lock, flags);
	if (available_irqs == 0)
		result = -ENOMEM;
	else {
		result = __ffs(available_irqs);
		available_irqs &= ~(1UL << result);
		dynamic_irq_init(result);
	}
	spin_unlock_irqrestore(&available_irqs_lock, flags);

	return result;
}
EXPORT_SYMBOL(create_irq);

void destroy_irq(unsigned int irq)
{
	unsigned long flags;

	spin_lock_irqsave(&available_irqs_lock, flags);
	available_irqs |= (1UL << irq);
	dynamic_irq_cleanup(irq);
	spin_unlock_irqrestore(&available_irqs_lock, flags);
}
EXPORT_SYMBOL(destroy_irq);

unsigned int irq_alloc_hwirq(int node)
{
	int ret = create_irq();
	return ret < 0 ? 0 : ret;
}

void irq_free_hwirq(unsigned int irq)
int arch_setup_hwirq(unsigned int irq, int node)
{
	destroy_irq(irq);
	return irq >= NR_IRQS ? -EINVAL : 0;
}

void arch_teardown_hwirq(unsigned int irq) { }
#endif