Loading arch/arm/boot/dts/omap3.dtsi +31 −0 Original line number Diff line number Diff line Loading @@ -397,5 +397,36 @@ timer12: timer@48304000 { ti,timer-alwon; ti,timer-secure; }; usbhstll: usbhstll@48062000 { compatible = "ti,usbhs-tll"; reg = <0x48062000 0x1000>; interrupts = <78>; ti,hwmods = "usb_tll_hs"; }; usbhshost: usbhshost@48064000 { compatible = "ti,usbhs-host"; reg = <0x48064000 0x400>; ti,hwmods = "usb_host_hs"; #address-cells = <1>; #size-cells = <1>; ranges; usbhsohci: ohci@48064400 { compatible = "ti,ohci-omap3", "usb-ohci"; reg = <0x48064400 0x400>; interrupt-parent = <&intc>; interrupts = <76>; }; usbhsehci: ehci@48064800 { compatible = "ti,ehci-omap", "usb-ehci"; reg = <0x48064800 0x400>; interrupt-parent = <&intc>; interrupts = <77>; }; }; }; }; Loading
arch/arm/boot/dts/omap3.dtsi +31 −0 Original line number Diff line number Diff line Loading @@ -397,5 +397,36 @@ timer12: timer@48304000 { ti,timer-alwon; ti,timer-secure; }; usbhstll: usbhstll@48062000 { compatible = "ti,usbhs-tll"; reg = <0x48062000 0x1000>; interrupts = <78>; ti,hwmods = "usb_tll_hs"; }; usbhshost: usbhshost@48064000 { compatible = "ti,usbhs-host"; reg = <0x48064000 0x400>; ti,hwmods = "usb_host_hs"; #address-cells = <1>; #size-cells = <1>; ranges; usbhsohci: ohci@48064400 { compatible = "ti,ohci-omap3", "usb-ohci"; reg = <0x48064400 0x400>; interrupt-parent = <&intc>; interrupts = <76>; }; usbhsehci: ehci@48064800 { compatible = "ti,ehci-omap", "usb-ehci"; reg = <0x48064800 0x400>; interrupt-parent = <&intc>; interrupts = <77>; }; }; }; };