Commit aa3e146d authored Oct 01, 2013 by Alex Deucher

drm/radeon: fix typo in CP DMA register headers



Wrong bit offset for SRC endian swapping.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

parent dca5086a

drivers/gpu/drm/radeon/evergreend.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -1501,7 +1501,7 @@
		* 6. COMMAND [29:22] \| BYTE_COUNT [20:0]
		*/
		# define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20)
		/* 0 - SRC_ADDR
		/* 0 - DST_ADDR
		* 1 - GDS
		*/
		# define PACKET3_CP_DMA_ENGINE(x) ((x) << 27)
		@@ -1516,7 +1516,7 @@
		# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
		/* COMMAND */
		# define PACKET3_CP_DMA_DIS_WC (1 << 21)
		# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
		# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22)
		/* 0 - none
		* 1 - 8 in 16
		* 2 - 8 in 32

drivers/gpu/drm/radeon/r600d.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -1523,7 +1523,7 @@
		*/
		# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
		/* COMMAND */
		# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
		# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22)
		/* 0 - none
		* 1 - 8 in 16
		* 2 - 8 in 32

drivers/gpu/drm/radeon/sid.h

+2 −2

Original line number	Diff line number	Diff line
		@@ -1553,7 +1553,7 @@
		* 6. COMMAND [30:21] \| BYTE_COUNT [20:0]
		*/
		# define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20)
		/* 0 - SRC_ADDR
		/* 0 - DST_ADDR
		* 1 - GDS
		*/
		# define PACKET3_CP_DMA_ENGINE(x) ((x) << 27)
		@@ -1568,7 +1568,7 @@
		# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
		/* COMMAND */
		# define PACKET3_CP_DMA_DIS_WC (1 << 21)
		# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
		# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22)
		/* 0 - none
		* 1 - 8 in 16
		* 2 - 8 in 32