Commit a4c9e2ee authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms/pm: add a proper pm profile init function for fusion 



The new power tables need to be handled differently when setting
up the profiles.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 10b391b9

drivers/gpu/drm/radeon/evergreen.c

+51 −0
Original line number Diff line number Diff line
@@ -157,6 +157,57 @@ int sumo_get_temp(struct radeon_device *rdev) 
	return actual_temp * 1000;

}



void sumo_pm_init_profile(struct radeon_device *rdev)

{

	int idx;



	/* default */

	rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;

	rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;

	rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0;

	rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0;



	/* low,mid sh/mh */

	if (rdev->flags & RADEON_IS_MOBILITY)

		idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

	else

		idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);



	rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;

	rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;



	rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;

	rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;



	rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;

	rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0;



	rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;

	rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;



	/* high sh/mh */

	idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

	rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0;

	rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx =

		rdev->pm.power_state[idx].num_clock_modes - 1;



	rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = idx;

	rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0;

	rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx =

		rdev->pm.power_state[idx].num_clock_modes - 1;

}



void evergreen_pm_misc(struct radeon_device *rdev)

{

	int req_ps_idx = rdev->pm.requested_power_state_index;

drivers/gpu/drm/radeon/r600.c

+20 −38
Original line number Diff line number Diff line
@@ -288,24 +288,6 @@ void r600_pm_get_dynpm_state(struct radeon_device *rdev) 
		  pcie_lanes);

}



static int r600_pm_get_type_index(struct radeon_device *rdev,

				  enum radeon_pm_state_type ps_type,

				  int instance)

{

	int i;

	int found_instance = -1;



	for (i = 0; i < rdev->pm.num_power_states; i++) {

		if (rdev->pm.power_state[i].type == ps_type) {

			found_instance++;

			if (found_instance == instance)

				return i;

		}

	}

	/* return default if no match */

	return rdev->pm.default_power_state_index;

}



void rs780_pm_init_profile(struct radeon_device *rdev)

{

	if (rdev->pm.num_power_states == 2) {
@@ -504,79 +486,79 @@ void r600_pm_init_profile(struct radeon_device *rdev) 
			/* low sh */

			if (rdev->flags & RADEON_IS_MOBILITY) {

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;

			} else {

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;

			}

			/* mid sh */

			if (rdev->flags & RADEON_IS_MOBILITY) {

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1;

			} else {

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1;

			}

			/* high sh */

			rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx =

				r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

				radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

			rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx =

				r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

				radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);

			rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0;

			rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2;

			/* low mh */

			if (rdev->flags & RADEON_IS_MOBILITY) {

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;

			} else {

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;

			}

			/* mid mh */

			if (rdev->flags & RADEON_IS_MOBILITY) {

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1;

			} else {

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx =

					r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

					radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;

				rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1;

			}

			/* high mh */

			rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx =

				r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

				radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

			rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx =

				r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

				radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);

			rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0;

			rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2;

		}

drivers/gpu/drm/radeon/radeon.h

+3 −0
Original line number Diff line number Diff line
@@ -855,6 +855,9 @@ struct radeon_pm { 
	struct device	        *int_hwmon_dev;

};



int radeon_pm_get_type_index(struct radeon_device *rdev,

			     enum radeon_pm_state_type ps_type,

			     int instance);



/*

 * Benchmarking

drivers/gpu/drm/radeon/radeon_asic.c

+1 −1
Original line number Diff line number Diff line
@@ -834,7 +834,7 @@ static struct radeon_asic sumo_asic = { 
	.pm_misc = &evergreen_pm_misc,

	.pm_prepare = &evergreen_pm_prepare,

	.pm_finish = &evergreen_pm_finish,

	.pm_init_profile = &rs780_pm_init_profile,

	.pm_init_profile = &sumo_pm_init_profile,

	.pm_get_dynpm_state = &r600_pm_get_dynpm_state,

	.pre_page_flip = &evergreen_pre_page_flip,

	.page_flip = &evergreen_page_flip,

drivers/gpu/drm/radeon/radeon_asic.h

+1 −0
Original line number Diff line number Diff line
@@ -413,6 +413,7 @@ extern int evergreen_cs_parse(struct radeon_cs_parser *p); 
extern void evergreen_pm_misc(struct radeon_device *rdev);

extern void evergreen_pm_prepare(struct radeon_device *rdev);

extern void evergreen_pm_finish(struct radeon_device *rdev);

extern void sumo_pm_init_profile(struct radeon_device *rdev);

extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc);

extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);

extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc);