Commit 9d9cb9c1 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Turn intel_color_check() into a vfunc 



The current intel_color_check() is a mess, and worse yet it is
in fact incorrect for several platforms. The hardware has
evolved quite a bit over the years, so let's just go for a clean
split between the platforms by turning this into a vfunc.
The actual work to split it up will follow.

v2: Assign the vfuncs in the order they appear in the
    struct (Matt)

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190327155045.28446-3-ville.syrjala@linux.intel.com
parent e0510da0

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -325,6 +325,7 @@ struct drm_i915_display_funcs { 
	/* display clock increase/decrease */

	/* pll clock increase/decrease */



	int (*color_check)(struct intel_crtc_state *crtc_state);

	/*

	 * Program double buffered color management registers during

	 * vblank evasion. The registers should then latch during the

drivers/gpu/drm/i915/intel_color.c

+20 −10
Original line number Diff line number Diff line
@@ -704,6 +704,13 @@ void intel_color_commit(const struct intel_crtc_state *crtc_state) 
	dev_priv->display.color_commit(crtc_state);

}



int intel_color_check(struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);



	return dev_priv->display.color_check(crtc_state);

}



static bool need_plane_update(struct intel_plane *plane,

			      const struct intel_crtc_state *crtc_state)

{
@@ -820,7 +827,7 @@ static u32 chv_cgm_mode(const struct intel_crtc_state *crtc_state) 
	return cgm_mode;

}



int intel_color_check(struct intel_crtc_state *crtc_state)

static int _intel_color_check(struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);

	const struct drm_property_blob *gamma_lut = crtc_state->base.gamma_lut;
@@ -888,13 +895,23 @@ void intel_color_init(struct intel_crtc *crtc) 
	drm_mode_crtc_set_gamma_size(&crtc->base, 256);



	if (HAS_GMCH(dev_priv)) {

		dev_priv->display.color_check = _intel_color_check;

		dev_priv->display.color_commit = i9xx_color_commit;



		if (IS_CHERRYVIEW(dev_priv))

			dev_priv->display.load_luts = cherryview_load_luts;

		else

			dev_priv->display.load_luts = i9xx_load_luts;



		dev_priv->display.color_commit = i9xx_color_commit;

	} else {

		dev_priv->display.color_check = _intel_color_check;



		if (INTEL_GEN(dev_priv) >= 9)

			dev_priv->display.color_commit = skl_color_commit;

		else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))

			dev_priv->display.color_commit = hsw_color_commit;

		else

			dev_priv->display.color_commit = ilk_color_commit;



		if (INTEL_GEN(dev_priv) >= 11)

			dev_priv->display.load_luts = icl_load_luts;

		else if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
@@ -903,13 +920,6 @@ void intel_color_init(struct intel_crtc *crtc) 
			dev_priv->display.load_luts = broadwell_load_luts;

		else

			dev_priv->display.load_luts = i9xx_load_luts;



		if (INTEL_GEN(dev_priv) >= 9)

			dev_priv->display.color_commit = skl_color_commit;

		else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))

			dev_priv->display.color_commit = hsw_color_commit;

		else

			dev_priv->display.color_commit = ilk_color_commit;

	}



	/* Enable color management support when we have degamma & gamma LUTs. */