Commit 9786e34e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd 

Pull MTD updates from Brian Norris:
 "NAND, from Boris:
   - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
     davinci, brcmnand, omap)
   - a huge cleanup/rework of the denali driver accompanied with core
     fixes/improvements to simplify the driver code
   - a complete rewrite of the atmel driver to support new DT bindings
     make future evolution easier
   - the addition of per-vendor detection/initialization steps to avoid
     extending the nand_ids table with more extended-id entries

  SPI NOR, from Cyrille:
   - fixes in the hisi, intel and Mediatek SPI controller drivers
   - fixes to some SPI flash memories not supporting the Chip Erase
     command.
   - add support to some new memory parts (Winbond, Macronix, Micron,
     ESMT).
   - add new driver for the STM32 QSPI controller

  And a few fixes for Gemini and Versatile platforms on physmap-of"

* tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits)
  MAINTAINERS: Update NAND subsystem git repositories
  mtd: nand: gpio: update binding
  mtd: nand: add ooblayout for old hamming layout
  mtd: oxnas_nand: Allocating more than necessary in probe()
  dt-bindings: mtd: Document the STM32 QSPI bindings
  mtd: mtk-nor: set controller's address width according to nor flash
  mtd: spi-nor: add driver for STM32 quad spi flash controller
  mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program
  mtd: nand: davinci: add comment on NAND subpage write status on keystone
  mtd: nand: omap2: Fix partition creation via cmdline mtdparts
  mtd: nand: NULL terminate a of_device_id table
  mtd: nand: Fix a couple error codes
  mtd: nand: allow drivers to request minimum alignment for passed buffer
  mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset
  mtd: nand: denali: allow to override revision number
  mtd: nand: denali_dt: use pdev instead of ofdev for platform_device
  mtd: nand: denali_dt: remove dma-mask DT property
  mtd: nand: denali: support 64bit capable DMA engine
  mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant
  mtd: nand: denali: support HW_ECC_FIXUP capability
  ...
parents 791a9a66 a9402889

Documentation/devicetree/bindings/mtd/atmel-nand.txt

+106 −1
Original line number Diff line number Diff line 
Atmel NAND flash

Atmel NAND flash controller bindings



The NAND flash controller node should be defined under the EBI bus (see

Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).

One or several NAND devices can be defined under this NAND controller.

The NAND controller might be connected to an ECC engine.



* NAND controller bindings:



Required properties:

- compatible: should be one of the following

	"atmel,at91rm9200-nand-controller"

	"atmel,at91sam9260-nand-controller"

	"atmel,at91sam9261-nand-controller"

	"atmel,at91sam9g45-nand-controller"

	"atmel,sama5d3-nand-controller"

- ranges: empty ranges property to forward EBI ranges definitions.

- #address-cells: should be set to 2.

- #size-cells: should be set to 1.

- atmel,nfc-io: phandle to the NFC IO block. Only required for sama5d3

		controllers.

- atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3

		  controllers.



Optional properties:

- ecc-engine: phandle to the PMECC block. Only meaningful if the SoC embeds

	      a PMECC engine.



* NAND device/chip bindings:



Required properties:

- reg: describes the CS lines assigned to the NAND device. If the NAND device

       exposes multiple CS lines (multi-dies chips), your reg property will

       contain X tuples of 3 entries.

       1st entry: the CS line this NAND chip is connected to

       2nd entry: the base offset of the memory region assigned to this

		  device (always 0)

       3rd entry: the memory region size (always 0x800000)



Optional properties:

- rb-gpios: the GPIO(s) used to check the Ready/Busy status of the NAND.

- cs-gpios: the GPIO(s) used to control the CS line.

- det-gpios: the GPIO used to detect if a Smartmedia Card is present.

- atmel,rb: an integer identifying the native Ready/Busy pin. Only meaningful

	    on sama5 SoCs.



All generic properties described in

Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND

device node, and NAND partitions should be defined under the NAND node as

described in Documentation/devicetree/bindings/mtd/partition.txt.



* ECC engine (PMECC) bindings:



Required properties:

- compatible: should be one of the following

	"atmel,at91sam9g45-pmecc"

	"atmel,sama5d4-pmecc"

	"atmel,sama5d2-pmecc"

- reg: should contain 2 register ranges. The first one is pointing to the PMECC

       block, and the second one to the PMECC_ERRLOC block.



Example:



	pmecc: ecc-engine@ffffc070 {

		compatible = "atmel,at91sam9g45-pmecc";

                reg = <0xffffc070 0x490>,

                      <0xffffc500 0x100>;

	};



	ebi: ebi@10000000 {

		compatible = "atmel,sama5d3-ebi";

		#address-cells = <2>;

		#size-cells = <1>;

		atmel,smc = <&hsmc>;

		reg = <0x10000000 0x10000000

		       0x40000000 0x30000000>;

		ranges = <0x0 0x0 0x10000000 0x10000000

			  0x1 0x0 0x40000000 0x10000000

			  0x2 0x0 0x50000000 0x10000000

			  0x3 0x0 0x60000000 0x10000000>;

		clocks = <&mck>;



                nand_controller: nand-controller {

			compatible = "atmel,sama5d3-nand-controller";

			atmel,nfc-sram = <&nfc_sram>;

			atmel,nfc-io = <&nfc_io>;

			ecc-engine = <&pmecc>;

			#address-cells = <2>;

			#size-cells = <1>;

			ranges;



			nand@3 {

				reg = <0x3 0x0 0x800000>;

				atmel,rb = <0>;



				/*

				 * Put generic NAND/MTD properties and

				 * subnodes here.

				 */

			};

		};

	};



-----------------------------------------------------------------------



Deprecated bindings (should not be used in new device trees):



Required properties:

- compatible: The possible values are:

Documentation/devicetree/bindings/mtd/denali-nand.txt

+3 −4
Original line number Diff line number Diff line 
* Denali NAND controller



Required properties:

  - compatible : should be "denali,denali-nand-dt"

  - compatible : should be one of the following:

      "altr,socfpga-denali-nand"            - for Altera SOCFPGA

  - reg : should contain registers location and length for data and reg.

  - reg-names: Should contain the reg names "nand_data" and "denali_reg"

  - interrupts : The interrupt number.

  - dm-mask : DMA bit mask



The device tree may optionally contain sub-nodes describing partitions of the

address space. See partition.txt for more detail.
@@ -15,9 +15,8 @@ Examples: 
nand: nand@ff900000 {

	#address-cells = <1>;

	#size-cells = <1>;

	compatible = "denali,denali-nand-dt";

	compatible = "altr,socfpga-denali-nand";

	reg = <0xff900000 0x100000>, <0xffb80000 0x10000>;

	reg-names = "nand_data", "denali_reg";

	interrupts = <0 144 4>;

	dma-mask = <0xffffffff>;

};

Documentation/devicetree/bindings/mtd/gpio-control-nand.txt

+2 −2
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ Required properties: 
- #address-cells, #size-cells : Must be present if the device has sub-nodes

  representing partitions.

- gpios : Specifies the GPIO pins to control the NAND device.  The order of

  GPIO references is:  RDY, nCE, ALE, CLE, and an optional nWP.

  GPIO references is:  RDY, nCE, ALE, CLE, and nWP. nCE and nWP are optional.



Optional properties:

- bank-width : Width (in bytes) of the device.  If not present, the width
@@ -36,7 +36,7 @@ gpio-nand@1,0 { 
	#address-cells = <1>;

	#size-cells = <1>;

	gpios = <&banka 1 0>,	/* RDY */

		<&banka 2 0>, 	/* nCE */

		<0>, 		/* nCE */

		<&banka 3 0>, 	/* ALE */

		<&banka 4 0>, 	/* CLE */

		<0>;		/* nWP */

Documentation/devicetree/bindings/mtd/stm32-quadspi.txt

0 → 100644
+43 −0
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* STMicroelectronics Quad Serial Peripheral Interface(QuadSPI)



Required properties:

- compatible: should be "st,stm32f469-qspi"

- reg: the first contains the register location and length.

       the second contains the memory mapping address and length

- reg-names: should contain the reg names "qspi" "qspi_mm"

- interrupts: should contain the interrupt for the device

- clocks: the phandle of the clock needed by the QSPI controller

- A pinctrl must be defined to set pins in mode of operation for QSPI transfer



Optional properties:

- resets: must contain the phandle to the reset controller.



A spi flash must be a child of the nor_flash node and could have some

properties. Also see jedec,spi-nor.txt.



Required properties:

- reg: chip-Select number (QSPI controller may connect 2 nor flashes)

- spi-max-frequency: max frequency of spi bus



Optional property:

- spi-rx-bus-width: see ../spi/spi-bus.txt for the description



Example:



qspi: spi@a0001000 {

	compatible = "st,stm32f469-qspi";

	reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>;

	reg-names = "qspi", "qspi_mm";

	interrupts = <91>;

	resets = <&rcc STM32F4_AHB3_RESET(QSPI)>;

	clocks = <&rcc 0 STM32F4_AHB3_CLOCK(QSPI)>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_qspi0>;



	flash@0 {

		reg = <0>;

		spi-rx-bus-width = <4>;

		spi-max-frequency = <108000000>;

		...

	};

};

MAINTAINERS

+7 −6
Original line number Diff line number Diff line
@@ -2274,7 +2274,7 @@ M: Wenyou Yang <wenyou.yang@atmel.com> 
M:	Josh Wu <rainyfeeling@outlook.com>

L:	linux-mtd@lists.infradead.org

S:	Supported

F:	drivers/mtd/nand/atmel_nand*

F:	drivers/mtd/nand/atmel/*



ATMEL SDMMC DRIVER

M:	Ludovic Desroches <ludovic.desroches@microchip.com>
@@ -8376,12 +8376,12 @@ M: Brian Norris <computersforpeace@gmail.com> 
M:	Boris Brezillon <boris.brezillon@free-electrons.com>

M:	Marek Vasut <marek.vasut@gmail.com>

M:	Richard Weinberger <richard@nod.at>

M:	Cyrille Pitchen <cyrille.pitchen@atmel.com>

M:	Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>

L:	linux-mtd@lists.infradead.org

W:	http://www.linux-mtd.infradead.org/

Q:	http://patchwork.ozlabs.org/project/linux-mtd/list/

T:	git git://git.infradead.org/linux-mtd.git

T:	git git://git.infradead.org/l2-mtd.git

T:	git git://git.infradead.org/linux-mtd.git master

T:	git git://git.infradead.org/l2-mtd.git master

S:	Maintained

F:	Documentation/devicetree/bindings/mtd/

F:	drivers/mtd/
@@ -8756,7 +8756,8 @@ R: Richard Weinberger <richard@nod.at> 
L:	linux-mtd@lists.infradead.org

W:	http://www.linux-mtd.infradead.org/

Q:	http://patchwork.ozlabs.org/project/linux-mtd/list/

T:	git git://github.com/linux-nand/linux.git

T:	git git://git.infradead.org/linux-mtd.git nand/fixes

T:	git git://git.infradead.org/l2-mtd.git nand/next

S:	Maintained

F:	drivers/mtd/nand/

F:	include/linux/mtd/nand*.h
@@ -12113,7 +12114,7 @@ S: Maintained 
F:	drivers/clk/spear/



SPI NOR SUBSYSTEM

M:	Cyrille Pitchen <cyrille.pitchen@atmel.com>

M:	Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>

M:	Marek Vasut <marek.vasut@gmail.com>

L:	linux-mtd@lists.infradead.org

W:	http://www.linux-mtd.infradead.org/