Commit 94cd65dd authored by Sumit.Saxena@lsi.com's avatar Sumit.Saxena@lsi.com Committed by James Bottomley
Browse files

[SCSI] megaraid_sas: addded support for big endian architecture



This patch will add big endian architecture support to megaraid_sas
driver. The support added is for LSI MegaRAID all generation controllers-
(3Gb/s, 6Gb/s and 12 Gb/s controllers).

We have done basic sanity test @ppc64 arch and @x86_64. Additional
testing/observations are welcome.

[jejb: fix up rejections]
Signed-off-by: default avatarKashyap Desai <kashyap.desai@lsi.com>
Signed-off-by: default avatarSumit Saxena <sumit.saxena@lsi.com>
Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parent 6f8f8e4d
Loading
Loading
Loading
Loading
+64 −15
Original line number Diff line number Diff line
@@ -492,6 +492,23 @@ struct megasas_ctrl_prop {
	* a bit in the following structure.
	*/
	struct {
#if   defined(__BIG_ENDIAN_BITFIELD)
		u32     reserved:18;
		u32     enableJBOD:1;
		u32     disableSpinDownHS:1;
		u32     allowBootWithPinnedCache:1;
		u32     disableOnlineCtrlReset:1;
		u32     enableSecretKeyControl:1;
		u32     autoEnhancedImport:1;
		u32     enableSpinDownUnconfigured:1;
		u32     SSDPatrolReadEnabled:1;
		u32     SSDSMARTerEnabled:1;
		u32     disableNCQ:1;
		u32     useFdeOnly:1;
		u32     prCorrectUnconfiguredAreas:1;
		u32     SMARTerEnabled:1;
		u32     copyBackDisabled:1;
#else
		u32     copyBackDisabled:1;
		u32     SMARTerEnabled:1;
		u32     prCorrectUnconfiguredAreas:1;
@@ -507,6 +524,7 @@ struct megasas_ctrl_prop {
		u32     disableSpinDownHS:1;
		u32     enableJBOD:1;
		u32     reserved:18;
#endif
	} OnOffProperties;
	u8 autoSnapVDSpace;
	u8 viewSpace;
@@ -820,6 +838,30 @@ struct megasas_ctrl_info {
	u16 cacheMemorySize;                    /*7A2h */

	struct {                                /*7A4h */
#if   defined(__BIG_ENDIAN_BITFIELD)
		u32     reserved:11;
		u32     supportUnevenSpans:1;
		u32     dedicatedHotSparesLimited:1;
		u32     headlessMode:1;
		u32     supportEmulatedDrives:1;
		u32     supportResetNow:1;
		u32     realTimeScheduler:1;
		u32     supportSSDPatrolRead:1;
		u32     supportPerfTuning:1;
		u32     disableOnlinePFKChange:1;
		u32     supportJBOD:1;
		u32     supportBootTimePFKChange:1;
		u32     supportSetLinkSpeed:1;
		u32     supportEmergencySpares:1;
		u32     supportSuspendResumeBGops:1;
		u32     blockSSDWriteCacheChange:1;
		u32     supportShieldState:1;
		u32     supportLdBBMInfo:1;
		u32     supportLdPIType3:1;
		u32     supportLdPIType2:1;
		u32     supportLdPIType1:1;
		u32     supportPIcontroller:1;
#else
		u32     supportPIcontroller:1;
		u32     supportLdPIType1:1;
		u32     supportLdPIType2:1;
@@ -845,6 +887,7 @@ struct megasas_ctrl_info {

		u32     supportUnevenSpans:1;
		u32     reserved:11;
#endif
	} adapterOperations2;

	u8  driverVersion[32];                  /*7A8h */
@@ -1069,9 +1112,15 @@ union megasas_sgl_frame {

typedef union _MFI_CAPABILITIES {
	struct {
#if   defined(__BIG_ENDIAN_BITFIELD)
		u32     reserved:30;
		u32     support_additional_msix:1;
		u32     support_fp_remote_lun:1;
#else
		u32     support_fp_remote_lun:1;
		u32     support_additional_msix:1;
		u32     reserved:30;
#endif
	} mfi_capabilities;
	u32     reg;
} MFI_CAPABILITIES;
+184 −139

File changed.

Preview size limit exceeded, changes collapsed.

+72 −62
Original line number Diff line number Diff line
@@ -128,12 +128,12 @@ static u8 MR_LdDataArmGet(u32 ld, u32 armIdx, struct MR_FW_RAID_MAP_ALL *map)

u16 MR_ArPdGet(u32 ar, u32 arm, struct MR_FW_RAID_MAP_ALL *map)
{
	return map->raidMap.arMapInfo[ar].pd[arm];
	return le16_to_cpu(map->raidMap.arMapInfo[ar].pd[arm]);
}

u16 MR_LdSpanArrayGet(u32 ld, u32 span, struct MR_FW_RAID_MAP_ALL *map)
{
	return map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef;
	return le16_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].span.arrayRef);
}

u16 MR_PdDevHandleGet(u32 pd, struct MR_FW_RAID_MAP_ALL *map)
@@ -148,7 +148,7 @@ u16 MR_GetLDTgtId(u32 ld, struct MR_FW_RAID_MAP_ALL *map)

u16 MR_TargetIdToLdGet(u32 ldTgtId, struct MR_FW_RAID_MAP_ALL *map)
{
	return map->raidMap.ldTgtIdToLd[ldTgtId];
	return le16_to_cpu(map->raidMap.ldTgtIdToLd[ldTgtId]);
}

static struct MR_LD_SPAN *MR_LdSpanPtrGet(u32 ld, u32 span,
@@ -167,18 +167,22 @@ u8 MR_ValidateMapInfo(struct megasas_instance *instance)
	struct LD_LOAD_BALANCE_INFO *lbInfo = fusion->load_balance_info;
	PLD_SPAN_INFO ldSpanInfo = fusion->log_to_span;
	struct MR_FW_RAID_MAP *pFwRaidMap = &map->raidMap;
	struct MR_LD_RAID         *raid;
	int ldCount, num_lds;
	u16 ld;

	if (pFwRaidMap->totalSize !=

	if (le32_to_cpu(pFwRaidMap->totalSize) !=
	    (sizeof(struct MR_FW_RAID_MAP) -sizeof(struct MR_LD_SPAN_MAP) +
	     (sizeof(struct MR_LD_SPAN_MAP) *pFwRaidMap->ldCount))) {
	     (sizeof(struct MR_LD_SPAN_MAP) * le32_to_cpu(pFwRaidMap->ldCount)))) {
		printk(KERN_ERR "megasas: map info structure size 0x%x is not matching with ld count\n",
		       (unsigned int)((sizeof(struct MR_FW_RAID_MAP) -
				       sizeof(struct MR_LD_SPAN_MAP)) +
				      (sizeof(struct MR_LD_SPAN_MAP) *
				       pFwRaidMap->ldCount)));
					le32_to_cpu(pFwRaidMap->ldCount))));
		printk(KERN_ERR "megasas: span map %x, pFwRaidMap->totalSize "
		       ": %x\n", (unsigned int)sizeof(struct MR_LD_SPAN_MAP),
		       pFwRaidMap->totalSize);
			le32_to_cpu(pFwRaidMap->totalSize));
		return 0;
	}

@@ -187,6 +191,15 @@ u8 MR_ValidateMapInfo(struct megasas_instance *instance)

	mr_update_load_balance_params(map, lbInfo);

	num_lds = le32_to_cpu(map->raidMap.ldCount);

	/*Convert Raid capability values to CPU arch */
	for (ldCount = 0; ldCount < num_lds; ldCount++) {
		ld = MR_TargetIdToLdGet(ldCount, map);
		raid = MR_LdRaidGet(ld, map);
		le32_to_cpus((u32 *)&raid->capability);
	}

	return 1;
}

@@ -200,23 +213,20 @@ u32 MR_GetSpanBlock(u32 ld, u64 row, u64 *span_blk,

	for (span = 0; span < raid->spanDepth; span++, pSpanBlock++) {

		for (j = 0; j < pSpanBlock->block_span_info.noElements; j++) {
		for (j = 0; j < le32_to_cpu(pSpanBlock->block_span_info.noElements); j++) {
			quad = &pSpanBlock->block_span_info.quad[j];

			if (quad->diff == 0)
			if (le32_to_cpu(quad->diff) == 0)
				return SPAN_INVALID;
			if (quad->logStart <= row  &&  row <= quad->logEnd  &&
			    (mega_mod64(row-quad->logStart, quad->diff)) == 0) {
			if (le64_to_cpu(quad->logStart) <= row && row <=
				le64_to_cpu(quad->logEnd) && (mega_mod64(row - le64_to_cpu(quad->logStart),
				le32_to_cpu(quad->diff))) == 0) {
				if (span_blk != NULL) {
					u64  blk, debugBlk;
					blk =
						mega_div64_32(
							(row-quad->logStart),
							quad->diff);
					blk =  mega_div64_32((row-le64_to_cpu(quad->logStart)), le32_to_cpu(quad->diff));
					debugBlk = blk;

					blk = (blk + quad->offsetInSpan) <<
						raid->stripeShift;
					blk = (blk + le64_to_cpu(quad->offsetInSpan)) << raid->stripeShift;
					*span_blk = blk;
				}
				return span;
@@ -257,8 +267,8 @@ static int getSpanInfo(struct MR_FW_RAID_MAP_ALL *map, PLD_SPAN_INFO ldSpanInfo)
		for (span = 0; span < raid->spanDepth; span++)
			dev_dbg(&instance->pdev->dev, "Span=%x,"
			" number of quads=%x\n", span,
			map->raidMap.ldSpanMap[ld].spanBlock[span].
			block_span_info.noElements);
			le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
			block_span_info.noElements));
		for (element = 0; element < MAX_QUAD_DEPTH; element++) {
			span_set = &(ldSpanInfo[ld].span_set[element]);
			if (span_set->span_row_data_width == 0)
@@ -286,22 +296,22 @@ static int getSpanInfo(struct MR_FW_RAID_MAP_ALL *map, PLD_SPAN_INFO ldSpanInfo)
				(long unsigned int)span_set->data_strip_end);

			for (span = 0; span < raid->spanDepth; span++) {
				if (map->raidMap.ldSpanMap[ld].spanBlock[span].
					block_span_info.noElements >=
				if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
					block_span_info.noElements) >=
					element + 1) {
					quad = &map->raidMap.ldSpanMap[ld].
						spanBlock[span].block_span_info.
						quad[element];
				dev_dbg(&instance->pdev->dev, "Span=%x,"
					"Quad=%x, diff=%x\n", span,
					element, quad->diff);
					element, le32_to_cpu(quad->diff));
				dev_dbg(&instance->pdev->dev,
					"offset_in_span=0x%08lx\n",
					(long unsigned int)quad->offsetInSpan);
					(long unsigned int)le64_to_cpu(quad->offsetInSpan));
				dev_dbg(&instance->pdev->dev,
					"logical start=0x%08lx, end=0x%08lx\n",
					(long unsigned int)quad->logStart,
					(long unsigned int)quad->logEnd);
					(long unsigned int)le64_to_cpu(quad->logStart),
					(long unsigned int)le64_to_cpu(quad->logEnd));
				}
			}
		}
@@ -348,23 +358,23 @@ u32 mr_spanset_get_span_block(struct megasas_instance *instance,
			continue;

		for (span = 0; span < raid->spanDepth; span++)
			if (map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements >= info+1) {
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements) >= info+1) {
				quad = &map->raidMap.ldSpanMap[ld].
					spanBlock[span].
					block_span_info.quad[info];
				if (quad->diff == 0)
				if (le32_to_cpu(quad->diff == 0))
					return SPAN_INVALID;
				if (quad->logStart <= row  &&
					row <= quad->logEnd  &&
					(mega_mod64(row - quad->logStart,
						quad->diff)) == 0) {
				if (le64_to_cpu(quad->logStart) <= row  &&
					row <= le64_to_cpu(quad->logEnd)  &&
					(mega_mod64(row - le64_to_cpu(quad->logStart),
						le32_to_cpu(quad->diff))) == 0) {
					if (span_blk != NULL) {
						u64  blk;
						blk = mega_div64_32
						    ((row - quad->logStart),
						    quad->diff);
						blk = (blk + quad->offsetInSpan)
						    ((row - le64_to_cpu(quad->logStart)),
						    le32_to_cpu(quad->diff));
						blk = (blk + le64_to_cpu(quad->offsetInSpan))
							 << raid->stripeShift;
						*span_blk = blk;
					}
@@ -415,8 +425,8 @@ static u64 get_row_from_strip(struct megasas_instance *instance,
		span_set_Row = mega_div64_32(span_set_Strip,
				span_set->span_row_data_width) * span_set->diff;
		for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
			if (map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements >= info+1) {
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements >= info+1)) {
				if (strip_offset >=
					span_set->strip_offset[span])
					span_offset++;
@@ -480,18 +490,18 @@ static u64 get_strip_from_row(struct megasas_instance *instance,
			continue;

		for (span = 0; span < raid->spanDepth; span++)
			if (map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements >= info+1) {
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements) >= info+1) {
				quad = &map->raidMap.ldSpanMap[ld].
					spanBlock[span].block_span_info.quad[info];
				if (quad->logStart <= row  &&
					row <= quad->logEnd  &&
					mega_mod64((row - quad->logStart),
					quad->diff) == 0) {
				if (le64_to_cpu(quad->logStart) <= row  &&
					row <= le64_to_cpu(quad->logEnd)  &&
					mega_mod64((row - le64_to_cpu(quad->logStart)),
					le32_to_cpu(quad->diff)) == 0) {
					strip = mega_div64_32
						(((row - span_set->data_row_start)
							- quad->logStart),
							quad->diff);
							- le64_to_cpu(quad->logStart)),
							le32_to_cpu(quad->diff));
					strip *= span_set->span_row_data_width;
					strip += span_set->data_strip_start;
					strip += span_set->strip_offset[span];
@@ -543,8 +553,8 @@ static u32 get_arm_from_strip(struct megasas_instance *instance,
				span_set->span_row_data_width);

		for (span = 0, span_offset = 0; span < raid->spanDepth; span++)
			if (map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements >= info+1) {
			if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
				block_span_info.noElements) >= info+1) {
				if (strip_offset >=
					span_set->strip_offset[span])
					span_offset =
@@ -669,7 +679,7 @@ static u8 mr_spanset_get_phy_params(struct megasas_instance *instance, u32 ld,
		}
	}

	*pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk;
	*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
	pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
					physArm;
	return retval;
@@ -765,7 +775,7 @@ u8 MR_GetPhyParams(struct megasas_instance *instance, u32 ld, u64 stripRow,
		}
	}

	*pdBlock += stripRef + MR_LdSpanPtrGet(ld, span, map)->startBlk;
	*pdBlock += stripRef + le64_to_cpu(MR_LdSpanPtrGet(ld, span, map)->startBlk);
	pRAID_Context->spanArm = (span << RAID_CTX_SPANARM_SPAN_SHIFT) |
		physArm;
	return retval;
@@ -965,7 +975,7 @@ MR_BuildRaidContext(struct megasas_instance *instance,
			regSize += stripSize;
	}

	pRAID_Context->timeoutValue     = map->raidMap.fpPdIoTimeoutSec;
	pRAID_Context->timeoutValue     = cpu_to_le16(map->raidMap.fpPdIoTimeoutSec);
	if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
		(instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
		pRAID_Context->regLockFlags = (isRead) ?
@@ -974,8 +984,8 @@ MR_BuildRaidContext(struct megasas_instance *instance,
		pRAID_Context->regLockFlags = (isRead) ?
			REGION_TYPE_SHARED_READ : raid->regTypeReqOnWrite;
	pRAID_Context->VirtualDiskTgtId = raid->targetId;
	pRAID_Context->regLockRowLBA    = regStart;
	pRAID_Context->regLockLength    = regSize;
	pRAID_Context->regLockRowLBA    = cpu_to_le64(regStart);
	pRAID_Context->regLockLength    = cpu_to_le32(regSize);
	pRAID_Context->configSeqNum	= raid->seqNum;
	/* save pointer to raid->LUN array */
	*raidLUN = raid->LUN;
@@ -1050,8 +1060,8 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map,
		raid = MR_LdRaidGet(ld, map);
		for (element = 0; element < MAX_QUAD_DEPTH; element++) {
			for (span = 0; span < raid->spanDepth; span++) {
				if (map->raidMap.ldSpanMap[ld].spanBlock[span].
					block_span_info.noElements <
				if (le32_to_cpu(map->raidMap.ldSpanMap[ld].spanBlock[span].
					block_span_info.noElements) <
					element + 1)
					continue;
				span_set = &(ldSpanInfo[ld].span_set[element]);
@@ -1059,14 +1069,14 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map,
					spanBlock[span].block_span_info.
					quad[element];

				span_set->diff = quad->diff;
				span_set->diff = le32_to_cpu(quad->diff);

				for (count = 0, span_row_width = 0;
					count < raid->spanDepth; count++) {
					if (map->raidMap.ldSpanMap[ld].
					if (le32_to_cpu(map->raidMap.ldSpanMap[ld].
						spanBlock[count].
						block_span_info.
						noElements >= element + 1) {
						noElements) >= element + 1) {
						span_set->strip_offset[count] =
							span_row_width;
						span_row_width +=
@@ -1080,9 +1090,9 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map,
				}

				span_set->span_row_data_width = span_row_width;
				span_row = mega_div64_32(((quad->logEnd -
					quad->logStart) + quad->diff),
					quad->diff);
				span_row = mega_div64_32(((le64_to_cpu(quad->logEnd) -
					le64_to_cpu(quad->logStart)) + le32_to_cpu(quad->diff)),
					le32_to_cpu(quad->diff));

				if (element == 0) {
					span_set->log_start_lba = 0;
@@ -1099,7 +1109,7 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map,

					span_set->data_row_start = 0;
					span_set->data_row_end =
						(span_row * quad->diff) - 1;
						(span_row * le32_to_cpu(quad->diff)) - 1;
				} else {
					span_set_prev = &(ldSpanInfo[ld].
							span_set[element - 1]);
@@ -1125,7 +1135,7 @@ void mr_update_span_set(struct MR_FW_RAID_MAP_ALL *map,
						span_set_prev->data_row_end + 1;
					span_set->data_row_end =
						span_set->data_row_start +
						(span_row * quad->diff) - 1;
						(span_row * le32_to_cpu(quad->diff)) - 1;
				}
				break;
		}
+63 −66
Original line number Diff line number Diff line
@@ -615,23 +615,20 @@ megasas_ioc_init_fusion(struct megasas_instance *instance)

	IOCInitMessage->Function = MPI2_FUNCTION_IOC_INIT;
	IOCInitMessage->WhoInit	= MPI2_WHOINIT_HOST_DRIVER;
	IOCInitMessage->MsgVersion = MPI2_VERSION;
	IOCInitMessage->HeaderVersion = MPI2_HEADER_VERSION;
	IOCInitMessage->SystemRequestFrameSize =
		MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE / 4;

	IOCInitMessage->ReplyDescriptorPostQueueDepth = fusion->reply_q_depth;
	IOCInitMessage->ReplyDescriptorPostQueueAddress	=
		fusion->reply_frames_desc_phys;
	IOCInitMessage->SystemRequestFrameBaseAddress =
		fusion->io_request_frames_phys;
	IOCInitMessage->MsgVersion = cpu_to_le16(MPI2_VERSION);
	IOCInitMessage->HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
	IOCInitMessage->SystemRequestFrameSize = cpu_to_le16(MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE / 4);

	IOCInitMessage->ReplyDescriptorPostQueueDepth = cpu_to_le16(fusion->reply_q_depth);
	IOCInitMessage->ReplyDescriptorPostQueueAddress	= cpu_to_le64(fusion->reply_frames_desc_phys);
	IOCInitMessage->SystemRequestFrameBaseAddress = cpu_to_le64(fusion->io_request_frames_phys);
	IOCInitMessage->HostMSIxVectors = instance->msix_vectors;
	init_frame = (struct megasas_init_frame *)cmd->frame;
	memset(init_frame, 0, MEGAMFI_FRAME_SIZE);

	frame_hdr = &cmd->frame->hdr;
	frame_hdr->cmd_status = 0xFF;
	frame_hdr->flags |= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
	frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);

	init_frame->cmd	= MFI_CMD_INIT;
	init_frame->cmd_status = 0xFF;
@@ -644,18 +641,21 @@ megasas_ioc_init_fusion(struct megasas_instance *instance)
	/* driver supports HA / Remote LUN over Fast Path interface */
	init_frame->driver_operations.mfi_capabilities.support_fp_remote_lun
		= 1;
	/* Convert capability to LE32 */
	cpu_to_le32s((u32 *)&init_frame->driver_operations.mfi_capabilities);


	init_frame->queue_info_new_phys_addr_lo = ioc_init_handle;
	init_frame->data_xfer_len = sizeof(struct MPI2_IOC_INIT_REQUEST);
	init_frame->queue_info_new_phys_addr_lo = cpu_to_le32((u32)ioc_init_handle);
	init_frame->data_xfer_len = cpu_to_le32(sizeof(struct MPI2_IOC_INIT_REQUEST));

	req_desc =
	  (union MEGASAS_REQUEST_DESCRIPTOR_UNION *)fusion->req_frames_desc;

	req_desc->Words = cmd->frame_phys_addr;
	req_desc->Words = 0;
	req_desc->MFAIo.RequestFlags =
		(MEGASAS_REQ_DESCRIPT_FLAGS_MFA <<
		 MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
	cpu_to_le32s((u32 *)&req_desc->MFAIo);
	req_desc->Words |= cpu_to_le64(cmd->frame_phys_addr);

	/*
	 * disable the intr before firing the init frame
@@ -746,13 +746,13 @@ megasas_get_ld_map_info(struct megasas_instance *instance)
	dcmd->cmd = MFI_CMD_DCMD;
	dcmd->cmd_status = 0xFF;
	dcmd->sge_count = 1;
	dcmd->flags = MFI_FRAME_DIR_READ;
	dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
	dcmd->timeout = 0;
	dcmd->pad_0 = 0;
	dcmd->data_xfer_len = size_map_info;
	dcmd->opcode = MR_DCMD_LD_MAP_GET_INFO;
	dcmd->sgl.sge32[0].phys_addr = ci_h;
	dcmd->sgl.sge32[0].length = size_map_info;
	dcmd->data_xfer_len = cpu_to_le32(size_map_info);
	dcmd->opcode = cpu_to_le32(MR_DCMD_LD_MAP_GET_INFO);
	dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
	dcmd->sgl.sge32[0].length = cpu_to_le32(size_map_info);

	if (!megasas_issue_polled(instance, cmd))
		ret = 0;
@@ -821,7 +821,7 @@ megasas_sync_map_info(struct megasas_instance *instance)

	map = fusion->ld_map[instance->map_id & 1];

	num_lds = map->raidMap.ldCount;
	num_lds = le32_to_cpu(map->raidMap.ldCount);

	dcmd = &cmd->frame->dcmd;

@@ -849,15 +849,15 @@ megasas_sync_map_info(struct megasas_instance *instance)
	dcmd->cmd = MFI_CMD_DCMD;
	dcmd->cmd_status = 0xFF;
	dcmd->sge_count = 1;
	dcmd->flags = MFI_FRAME_DIR_WRITE;
	dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_WRITE);
	dcmd->timeout = 0;
	dcmd->pad_0 = 0;
	dcmd->data_xfer_len = size_map_info;
	dcmd->data_xfer_len = cpu_to_le32(size_map_info);
	dcmd->mbox.b[0] = num_lds;
	dcmd->mbox.b[1] = MEGASAS_DCMD_MBOX_PEND_FLAG;
	dcmd->opcode = MR_DCMD_LD_MAP_GET_INFO;
	dcmd->sgl.sge32[0].phys_addr = ci_h;
	dcmd->sgl.sge32[0].length = size_map_info;
	dcmd->opcode = cpu_to_le32(MR_DCMD_LD_MAP_GET_INFO);
	dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
	dcmd->sgl.sge32[0].length = cpu_to_le32(size_map_info);

	instance->map_update_cmd = cmd;

@@ -1060,9 +1060,8 @@ megasas_fire_cmd_fusion(struct megasas_instance *instance,

	spin_lock_irqsave(&instance->hba_lock, flags);

	writel(req_desc_lo,
	       &(regs)->inbound_low_queue_port);
	writel(req_desc_hi, &(regs)->inbound_high_queue_port);
	writel(le32_to_cpu(req_desc_lo), &(regs)->inbound_low_queue_port);
	writel(le32_to_cpu(req_desc_hi), &(regs)->inbound_high_queue_port);
	spin_unlock_irqrestore(&instance->hba_lock, flags);
}

@@ -1150,8 +1149,8 @@ megasas_make_sgl_fusion(struct megasas_instance *instance,
		return sge_count;

	scsi_for_each_sg(scp, os_sgl, sge_count, i) {
		sgl_ptr->Length = sg_dma_len(os_sgl);
		sgl_ptr->Address = sg_dma_address(os_sgl);
		sgl_ptr->Length = cpu_to_le32(sg_dma_len(os_sgl));
		sgl_ptr->Address = cpu_to_le64(sg_dma_address(os_sgl));
		sgl_ptr->Flags = 0;
		if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
			(instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
@@ -1170,7 +1169,7 @@ megasas_make_sgl_fusion(struct megasas_instance *instance,
				PCI_DEVICE_ID_LSI_INVADER) ||
				(instance->pdev->device ==
				PCI_DEVICE_ID_LSI_FURY)) {
				if ((cmd->io_request->IoFlags &
				if ((le16_to_cpu(cmd->io_request->IoFlags) &
					MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH) !=
					MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH)
					cmd->io_request->ChainOffset =
@@ -1194,9 +1193,8 @@ megasas_make_sgl_fusion(struct megasas_instance *instance,
				sg_chain->Flags =
					(IEEE_SGE_FLAGS_CHAIN_ELEMENT |
					 MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR);
			sg_chain->Length =  (sizeof(union MPI2_SGE_IO_UNION)
					     *(sge_count - sg_processed));
			sg_chain->Address = cmd->sg_frame_phys_addr;
			sg_chain->Length =  cpu_to_le32((sizeof(union MPI2_SGE_IO_UNION) * (sge_count - sg_processed)));
			sg_chain->Address = cpu_to_le64(cmd->sg_frame_phys_addr);

			sgl_ptr =
			  (struct MPI25_IEEE_SGE_CHAIN64 *)cmd->sg_frame;
@@ -1254,7 +1252,7 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len,
		io_request->CDB.EEDP32.PrimaryReferenceTag =
			cpu_to_be32(ref_tag);
		io_request->CDB.EEDP32.PrimaryApplicationTagMask = 0xffff;
		io_request->IoFlags = 32; /* Specify 32-byte cdb */
		io_request->IoFlags = cpu_to_le16(32); /* Specify 32-byte cdb */

		/* Transfer length */
		cdb[28] = (u8)((num_blocks >> 24) & 0xff);
@@ -1264,19 +1262,19 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len,

		/* set SCSI IO EEDPFlags */
		if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) {
			io_request->EEDPFlags =
			io_request->EEDPFlags = cpu_to_le16(
				MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG  |
				MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG |
				MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP |
				MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG |
				MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD;
				MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD);
		} else {
			io_request->EEDPFlags =
			io_request->EEDPFlags = cpu_to_le16(
				MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG |
				MPI2_SCSIIO_EEDPFLAGS_INSERT_OP;
				MPI2_SCSIIO_EEDPFLAGS_INSERT_OP);
		}
		io_request->Control |= (0x4 << 26);
		io_request->EEDPBlockSize = scp->device->sector_size;
		io_request->Control |= cpu_to_le32((0x4 << 26));
		io_request->EEDPBlockSize = cpu_to_le32(scp->device->sector_size);
	} else {
		/* Some drives don't support 16/12 byte CDB's, convert to 10 */
		if (((cdb_len == 12) || (cdb_len == 16)) &&
@@ -1304,7 +1302,7 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len,
			cdb[8] = (u8)(num_blocks & 0xff);
			cdb[7] = (u8)((num_blocks >> 8) & 0xff);

			io_request->IoFlags = 10; /* Specify 10-byte cdb */
			io_request->IoFlags = cpu_to_le16(10); /* Specify 10-byte cdb */
			cdb_len = 10;
		} else if ((cdb_len < 16) && (start_blk > 0xffffffff)) {
			/* Convert to 16 byte CDB for large LBA's */
@@ -1342,7 +1340,7 @@ megasas_set_pd_lba(struct MPI2_RAID_SCSI_IO_REQUEST *io_request, u8 cdb_len,
			cdb[11] = (u8)((num_blocks >> 16) & 0xff);
			cdb[10] = (u8)((num_blocks >> 24) & 0xff);

			io_request->IoFlags = 16; /* Specify 16-byte cdb */
			io_request->IoFlags = cpu_to_le16(16); /* Specify 16-byte cdb */
			cdb_len = 16;
		}

@@ -1410,7 +1408,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
	fusion = instance->ctrl_context;

	io_request = cmd->io_request;
	io_request->RaidContext.VirtualDiskTgtId = device_id;
	io_request->RaidContext.VirtualDiskTgtId = cpu_to_le16(device_id);
	io_request->RaidContext.status = 0;
	io_request->RaidContext.exStatus = 0;

@@ -1474,7 +1472,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
	io_info.ldStartBlock = ((u64)start_lba_hi << 32) | start_lba_lo;
	io_info.numBlocks = datalength;
	io_info.ldTgtId = device_id;
	io_request->DataLength = scsi_bufflen(scp);
	io_request->DataLength = cpu_to_le32(scsi_bufflen(scp));

	if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
		io_info.isRead = 1;
@@ -1514,8 +1512,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
					MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
			io_request->RaidContext.Type = MPI2_TYPE_CUDA;
			io_request->RaidContext.nseg = 0x1;
			io_request->IoFlags |=
			  MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH;
			io_request->IoFlags |= cpu_to_le16(MPI25_SAS_DEVICE0_FLAGS_ENABLED_FAST_PATH);
			io_request->RaidContext.regLockFlags |=
			  (MR_RL_FLAGS_GRANT_DESTINATION_CUDA |
			   MR_RL_FLAGS_SEQ_NUM_ENABLE);
@@ -1535,7 +1532,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
		memcpy(io_request->LUN, raidLUN, 8);
	} else {
		io_request->RaidContext.timeoutValue =
			local_map_ptr->raidMap.fpPdIoTimeoutSec;
			cpu_to_le16(local_map_ptr->raidMap.fpPdIoTimeoutSec);
		cmd->request_desc->SCSIIO.RequestFlags =
			(MEGASAS_REQ_DESCRIPT_FLAGS_LD_IO
			 << MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
@@ -1553,7 +1550,7 @@ megasas_build_ldio_fusion(struct megasas_instance *instance,
			io_request->RaidContext.nseg = 0x1;
		}
		io_request->Function = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST;
		io_request->DevHandle = device_id;
		io_request->DevHandle = cpu_to_le16(device_id);
	} /* Not FP */
}

@@ -1587,7 +1584,7 @@ megasas_build_dcdb_fusion(struct megasas_instance *instance,
		+scmd->device->id;
	local_map_ptr = fusion->ld_map[(instance->map_id & 1)];

	io_request->DataLength = scsi_bufflen(scmd);
	io_request->DataLength = cpu_to_le32(scsi_bufflen(scmd));


	/* Check if this is a system PD I/O */
@@ -1647,7 +1644,7 @@ megasas_build_dcdb_fusion(struct megasas_instance *instance,
		/* set RAID context values */
		pRAID_Context->regLockFlags     = REGION_TYPE_SHARED_READ;
		pRAID_Context->timeoutValue     = raid->fpIoTimeoutForLd;
		pRAID_Context->VirtualDiskTgtId = device_id;
		pRAID_Context->VirtualDiskTgtId = cpu_to_le16(device_id);
		pRAID_Context->regLockRowLBA    = 0;
		pRAID_Context->regLockLength    = 0;
		pRAID_Context->configSeqNum     = raid->seqNum;
@@ -1676,12 +1673,12 @@ megasas_build_dcdb_fusion(struct megasas_instance *instance,

NonFastPath:
		io_request->Function  = MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST;
		io_request->DevHandle = device_id;
		io_request->DevHandle = cpu_to_le16(device_id);
		cmd->request_desc->SCSIIO.RequestFlags =
			(MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
			 MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);
	}
	io_request->RaidContext.VirtualDiskTgtId = device_id;
	io_request->RaidContext.VirtualDiskTgtId = cpu_to_le16(device_id);
	io_request->LUN[1] = scmd->device->lun;
}

@@ -1721,7 +1718,7 @@ megasas_build_io_fusion(struct megasas_instance *instance,
	 * Just the CDB length,rest of the Flags are zero
	 * This will be modified for FP in build_ldio_fusion
	 */
	io_request->IoFlags = scp->cmd_len;
	io_request->IoFlags = cpu_to_le16(scp->cmd_len);

	if (megasas_is_ldio(scp))
		megasas_build_ldio_fusion(instance, scp, cmd);
@@ -1746,17 +1743,17 @@ megasas_build_io_fusion(struct megasas_instance *instance,

	io_request->RaidContext.numSGE = sge_count;

	io_request->SGLFlags = MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
	io_request->SGLFlags = cpu_to_le16(MPI2_SGE_FLAGS_64_BIT_ADDRESSING);

	if (scp->sc_data_direction == PCI_DMA_TODEVICE)
		io_request->Control |= MPI2_SCSIIO_CONTROL_WRITE;
		io_request->Control |= cpu_to_le32(MPI2_SCSIIO_CONTROL_WRITE);
	else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
		io_request->Control |= MPI2_SCSIIO_CONTROL_READ;
		io_request->Control |= cpu_to_le32(MPI2_SCSIIO_CONTROL_READ);

	io_request->SGLOffset0 =
		offsetof(struct MPI2_RAID_SCSI_IO_REQUEST, SGL) / 4;

	io_request->SenseBufferLowAddress = cmd->sense_phys_addr;
	io_request->SenseBufferLowAddress = cpu_to_le32(cmd->sense_phys_addr);
	io_request->SenseBufferLength = SCSI_SENSE_BUFFERSIZE;

	cmd->scmd = scp;
@@ -1821,7 +1818,7 @@ megasas_build_and_issue_cmd_fusion(struct megasas_instance *instance,
	}

	req_desc = cmd->request_desc;
	req_desc->SCSIIO.SMID = index;
	req_desc->SCSIIO.SMID = cpu_to_le16(index);

	if (cmd->io_request->ChainOffset != 0 &&
	    cmd->io_request->ChainOffset != 0xF)
@@ -1883,7 +1880,7 @@ complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex)
	num_completed = 0;

	while ((d_val.u.low != UINT_MAX) && (d_val.u.high != UINT_MAX)) {
		smid = reply_desc->SMID;
		smid = le16_to_cpu(reply_desc->SMID);

		cmd_fusion = fusion->cmd_list[smid - 1];

@@ -2101,12 +2098,12 @@ build_mpt_mfi_pass_thru(struct megasas_instance *instance,
				       SGL) / 4;
	io_req->ChainOffset = fusion->chain_offset_mfi_pthru;

	mpi25_ieee_chain->Address = mfi_cmd->frame_phys_addr;
	mpi25_ieee_chain->Address = cpu_to_le64(mfi_cmd->frame_phys_addr);

	mpi25_ieee_chain->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT |
		MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR;

	mpi25_ieee_chain->Length = MEGASAS_MAX_SZ_CHAIN_FRAME;
	mpi25_ieee_chain->Length = cpu_to_le32(MEGASAS_MAX_SZ_CHAIN_FRAME);

	return 0;
}
@@ -2139,7 +2136,7 @@ build_mpt_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
	req_desc->SCSIIO.RequestFlags = (MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO <<
					 MEGASAS_REQ_DESCRIPT_FLAGS_TYPE_SHIFT);

	req_desc->SCSIIO.SMID = index;
	req_desc->SCSIIO.SMID = cpu_to_le16(index);

	return req_desc;
}
+24 −0
Original line number Diff line number Diff line
@@ -93,8 +93,13 @@ enum MR_RAID_FLAGS_IO_SUB_TYPE {
 */

struct RAID_CONTEXT {
#if   defined(__BIG_ENDIAN_BITFIELD)
	u8	nseg:4;
	u8	Type:4;
#else
	u8	Type:4;
	u8	nseg:4;
#endif
	u8	resvd0;
	u16     timeoutValue;
	u8      regLockFlags;
@@ -298,8 +303,13 @@ struct MPI2_RAID_SCSI_IO_REQUEST {
 * MPT RAID MFA IO Descriptor.
 */
struct MEGASAS_RAID_MFA_IO_REQUEST_DESCRIPTOR {
#if   defined(__BIG_ENDIAN_BITFIELD)
	u32     MessageAddress1:24; /* bits 31:8*/
	u32     RequestFlags:8;
#else
	u32     RequestFlags:8;
	u32     MessageAddress1:24; /* bits 31:8*/
#endif
	u32     MessageAddress2;      /* bits 61:32 */
};

@@ -518,6 +528,19 @@ struct MR_SPAN_BLOCK_INFO {

struct MR_LD_RAID {
	struct {
#if   defined(__BIG_ENDIAN_BITFIELD)
		u32     reserved4:7;
		u32	fpNonRWCapable:1;
		u32     fpReadAcrossStripe:1;
		u32     fpWriteAcrossStripe:1;
		u32     fpReadCapable:1;
		u32     fpWriteCapable:1;
		u32     encryptionType:8;
		u32     pdPiMode:4;
		u32     ldPiMode:4;
		u32     reserved5:3;
		u32     fpCapable:1;
#else
		u32     fpCapable:1;
		u32     reserved5:3;
		u32     ldPiMode:4;
@@ -529,6 +552,7 @@ struct MR_LD_RAID {
		u32     fpReadAcrossStripe:1;
		u32	fpNonRWCapable:1;
		u32     reserved4:7;
#endif
	} capability;
	u32     reserved6;
	u64     size;