Loading arch/avr32/Kconfig +1 −3 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ config AVR32 select HARDIRQS_SW_RESEND select GENERIC_IRQ_SHOW select ARCH_HAVE_NMI_SAFE_CMPXCHG select GENERIC_CLOCKEVENTS help AVR32 is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular Loading @@ -35,9 +36,6 @@ config TRACE_IRQFLAGS_SUPPORT config RWSEM_GENERIC_SPINLOCK def_bool y config GENERIC_CLOCKEVENTS def_bool y config RWSEM_XCHGADD_ALGORITHM def_bool n Loading Loading
arch/avr32/Kconfig +1 −3 Original line number Diff line number Diff line Loading @@ -12,6 +12,7 @@ config AVR32 select HARDIRQS_SW_RESEND select GENERIC_IRQ_SHOW select ARCH_HAVE_NMI_SAFE_CMPXCHG select GENERIC_CLOCKEVENTS help AVR32 is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular Loading @@ -35,9 +36,6 @@ config TRACE_IRQFLAGS_SUPPORT config RWSEM_GENERIC_SPINLOCK def_bool y config GENERIC_CLOCKEVENTS def_bool y config RWSEM_XCHGADD_ALGORITHM def_bool n Loading