Loading arch/arm/mach-mx3/devices.c +14 −6 Original line number Diff line number Diff line Loading @@ -366,8 +366,8 @@ struct platform_device mx3_camera = { static struct resource otg_resources[] = { { .start = OTG_BASE_ADDR, .end = OTG_BASE_ADDR + 0x1ff, .start = MX31_OTG_BASE_ADDR, .end = MX31_OTG_BASE_ADDR + 0x1ff, .flags = IORESOURCE_MEM, }, { .start = MXC_INT_USB3, Loading Loading @@ -408,8 +408,8 @@ static u64 usbh1_dmamask = ~(u32)0; static struct resource mxc_usbh1_resources[] = { { .start = OTG_BASE_ADDR + 0x200, .end = OTG_BASE_ADDR + 0x3ff, .start = MX31_OTG_BASE_ADDR + 0x200, .end = MX31_OTG_BASE_ADDR + 0x3ff, .flags = IORESOURCE_MEM, }, { .start = MXC_INT_USB1, Loading @@ -434,8 +434,8 @@ static u64 usbh2_dmamask = ~(u32)0; static struct resource mxc_usbh2_resources[] = { { .start = OTG_BASE_ADDR + 0x400, .end = OTG_BASE_ADDR + 0x5ff, .start = MX31_OTG_BASE_ADDR + 0x400, .end = MX31_OTG_BASE_ADDR + 0x5ff, .flags = IORESOURCE_MEM, }, { .start = MXC_INT_USB2, Loading Loading @@ -547,6 +547,14 @@ static int mx3_devices_init(void) if (cpu_is_mx35()) { mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; otg_resources[0].start = MX35_OTG_BASE_ADDR; otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; otg_resources[1].start = MXC_INT_USBOTG; otg_resources[1].end = MXC_INT_USBOTG; mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400; mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; mxc_usbh1_resources[1].start = MXC_INT_USBHS; mxc_usbh1_resources[1].end = MXC_INT_USBHS; } return 0; Loading arch/arm/plat-mxc/include/mach/mx31.h +1 −1 Original line number Diff line number Diff line Loading @@ -4,7 +4,7 @@ #define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ #define MX31_IRAM_SIZE SZ_16K #define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) #define MX31_OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) #define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) #define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) #define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) Loading arch/arm/plat-mxc/include/mach/mx35.h +1 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,7 @@ #define MX35_IRAM_SIZE SZ_128K #define MXC_FEC_BASE_ADDR 0x50038000 #define MX35_OTG_BASE_ADDR 0x53ff4000 #define MX35_NFC_BASE_ADDR 0xBB000000 /* Loading Loading
arch/arm/mach-mx3/devices.c +14 −6 Original line number Diff line number Diff line Loading @@ -366,8 +366,8 @@ struct platform_device mx3_camera = { static struct resource otg_resources[] = { { .start = OTG_BASE_ADDR, .end = OTG_BASE_ADDR + 0x1ff, .start = MX31_OTG_BASE_ADDR, .end = MX31_OTG_BASE_ADDR + 0x1ff, .flags = IORESOURCE_MEM, }, { .start = MXC_INT_USB3, Loading Loading @@ -408,8 +408,8 @@ static u64 usbh1_dmamask = ~(u32)0; static struct resource mxc_usbh1_resources[] = { { .start = OTG_BASE_ADDR + 0x200, .end = OTG_BASE_ADDR + 0x3ff, .start = MX31_OTG_BASE_ADDR + 0x200, .end = MX31_OTG_BASE_ADDR + 0x3ff, .flags = IORESOURCE_MEM, }, { .start = MXC_INT_USB1, Loading @@ -434,8 +434,8 @@ static u64 usbh2_dmamask = ~(u32)0; static struct resource mxc_usbh2_resources[] = { { .start = OTG_BASE_ADDR + 0x400, .end = OTG_BASE_ADDR + 0x5ff, .start = MX31_OTG_BASE_ADDR + 0x400, .end = MX31_OTG_BASE_ADDR + 0x5ff, .flags = IORESOURCE_MEM, }, { .start = MXC_INT_USB2, Loading Loading @@ -547,6 +547,14 @@ static int mx3_devices_init(void) if (cpu_is_mx35()) { mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; otg_resources[0].start = MX35_OTG_BASE_ADDR; otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff; otg_resources[1].start = MXC_INT_USBOTG; otg_resources[1].end = MXC_INT_USBOTG; mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400; mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff; mxc_usbh1_resources[1].start = MXC_INT_USBHS; mxc_usbh1_resources[1].end = MXC_INT_USBHS; } return 0; Loading
arch/arm/plat-mxc/include/mach/mx31.h +1 −1 Original line number Diff line number Diff line Loading @@ -4,7 +4,7 @@ #define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ #define MX31_IRAM_SIZE SZ_16K #define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) #define MX31_OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) #define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) #define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) #define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) Loading
arch/arm/plat-mxc/include/mach/mx35.h +1 −0 Original line number Diff line number Diff line Loading @@ -5,6 +5,7 @@ #define MX35_IRAM_SIZE SZ_128K #define MXC_FEC_BASE_ADDR 0x50038000 #define MX35_OTG_BASE_ADDR 0x53ff4000 #define MX35_NFC_BASE_ADDR 0xBB000000 /* Loading