Loading arch/arm/mach-tegra/board-dt-tegra114.c +1 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,7 @@ static const char * const tegra114_dt_board_compat[] = { DT_MACHINE_START(TEGRA114_DT, "NVIDIA Tegra114 (Flattened Device Tree)") .smp = smp_ops(tegra_smp_ops), .map_io = tegra_map_common_io, .init_early = tegra114_init_early, .init_early = tegra_init_early, .init_irq = tegra_dt_init_irq, .init_time = clocksource_of_init, .init_machine = tegra114_dt_init, Loading arch/arm/mach-tegra/board-dt-tegra20.c +1 −1 Original line number Diff line number Diff line Loading @@ -145,7 +145,7 @@ static const char *tegra20_dt_board_compat[] = { DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") .map_io = tegra_map_common_io, .smp = smp_ops(tegra_smp_ops), .init_early = tegra20_init_early, .init_early = tegra_init_early, .init_irq = tegra_dt_init_irq, .init_time = clocksource_of_init, .init_machine = tegra_dt_init, Loading arch/arm/mach-tegra/board-dt-tegra30.c +2 −2 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ * * NVIDIA Tegra30 device tree board support * * Copyright (C) 2011 NVIDIA Corporation * Copyright (C) 2011, 2013, NVIDIA Corporation * * Derived from: * Loading Loading @@ -50,7 +50,7 @@ static const char *tegra30_dt_board_compat[] = { DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)") .smp = smp_ops(tegra_smp_ops), .map_io = tegra_map_common_io, .init_early = tegra30_init_early, .init_early = tegra_init_early, .init_irq = tegra_dt_init_irq, .init_time = clocksource_of_init, .init_machine = tegra30_dt_init, Loading arch/arm/mach-tegra/board.h +1 −3 Original line number Diff line number Diff line Loading @@ -26,9 +26,7 @@ void tegra_assert_system_reset(char mode, const char *cmd); void __init tegra20_init_early(void); void __init tegra30_init_early(void); void __init tegra114_init_early(void); void __init tegra_init_early(void); void __init tegra_map_common_io(void); void __init tegra_init_irq(void); void __init tegra_dt_init_irq(void); Loading arch/arm/mach-tegra/common.c +2 −24 Original line number Diff line number Diff line Loading @@ -94,7 +94,7 @@ static void __init tegra_init_cache(void) } static void __init tegra_init_early(void) void __init tegra_init_early(void) { tegra_cpu_reset_handler_init(); tegra_apb_io_init(); Loading @@ -102,31 +102,9 @@ static void __init tegra_init_early(void) tegra_init_cache(); tegra_pmc_init(); tegra_powergate_init(); tegra_hotplug_init(); } #ifdef CONFIG_ARCH_TEGRA_2x_SOC void __init tegra20_init_early(void) { tegra_init_early(); tegra20_hotplug_init(); } #endif #ifdef CONFIG_ARCH_TEGRA_3x_SOC void __init tegra30_init_early(void) { tegra_init_early(); tegra30_hotplug_init(); } #endif #ifdef CONFIG_ARCH_TEGRA_114_SOC void __init tegra114_init_early(void) { tegra_init_early(); } #endif void __init tegra_init_late(void) { tegra_powergate_debugfs_init(); Loading Loading
arch/arm/mach-tegra/board-dt-tegra114.c +1 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,7 @@ static const char * const tegra114_dt_board_compat[] = { DT_MACHINE_START(TEGRA114_DT, "NVIDIA Tegra114 (Flattened Device Tree)") .smp = smp_ops(tegra_smp_ops), .map_io = tegra_map_common_io, .init_early = tegra114_init_early, .init_early = tegra_init_early, .init_irq = tegra_dt_init_irq, .init_time = clocksource_of_init, .init_machine = tegra114_dt_init, Loading
arch/arm/mach-tegra/board-dt-tegra20.c +1 −1 Original line number Diff line number Diff line Loading @@ -145,7 +145,7 @@ static const char *tegra20_dt_board_compat[] = { DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") .map_io = tegra_map_common_io, .smp = smp_ops(tegra_smp_ops), .init_early = tegra20_init_early, .init_early = tegra_init_early, .init_irq = tegra_dt_init_irq, .init_time = clocksource_of_init, .init_machine = tegra_dt_init, Loading
arch/arm/mach-tegra/board-dt-tegra30.c +2 −2 Original line number Diff line number Diff line Loading @@ -3,7 +3,7 @@ * * NVIDIA Tegra30 device tree board support * * Copyright (C) 2011 NVIDIA Corporation * Copyright (C) 2011, 2013, NVIDIA Corporation * * Derived from: * Loading Loading @@ -50,7 +50,7 @@ static const char *tegra30_dt_board_compat[] = { DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)") .smp = smp_ops(tegra_smp_ops), .map_io = tegra_map_common_io, .init_early = tegra30_init_early, .init_early = tegra_init_early, .init_irq = tegra_dt_init_irq, .init_time = clocksource_of_init, .init_machine = tegra30_dt_init, Loading
arch/arm/mach-tegra/board.h +1 −3 Original line number Diff line number Diff line Loading @@ -26,9 +26,7 @@ void tegra_assert_system_reset(char mode, const char *cmd); void __init tegra20_init_early(void); void __init tegra30_init_early(void); void __init tegra114_init_early(void); void __init tegra_init_early(void); void __init tegra_map_common_io(void); void __init tegra_init_irq(void); void __init tegra_dt_init_irq(void); Loading
arch/arm/mach-tegra/common.c +2 −24 Original line number Diff line number Diff line Loading @@ -94,7 +94,7 @@ static void __init tegra_init_cache(void) } static void __init tegra_init_early(void) void __init tegra_init_early(void) { tegra_cpu_reset_handler_init(); tegra_apb_io_init(); Loading @@ -102,31 +102,9 @@ static void __init tegra_init_early(void) tegra_init_cache(); tegra_pmc_init(); tegra_powergate_init(); tegra_hotplug_init(); } #ifdef CONFIG_ARCH_TEGRA_2x_SOC void __init tegra20_init_early(void) { tegra_init_early(); tegra20_hotplug_init(); } #endif #ifdef CONFIG_ARCH_TEGRA_3x_SOC void __init tegra30_init_early(void) { tegra_init_early(); tegra30_hotplug_init(); } #endif #ifdef CONFIG_ARCH_TEGRA_114_SOC void __init tegra114_init_early(void) { tegra_init_early(); } #endif void __init tegra_init_late(void) { tegra_powergate_debugfs_init(); Loading