Loading drivers/dma/ioatdma.c +4 −6 Original line number Diff line number Diff line Loading @@ -608,13 +608,11 @@ static void ioat_start_null_desc(struct ioat_dma_chan *ioat_chan) list_add_tail(&desc->node, &ioat_chan->used_desc); spin_unlock_bh(&ioat_chan->desc_lock); #if (BITS_PER_LONG == 64) writeq(desc->phys, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET); #else writel((u32) desc->phys, writel(((u64) desc->phys) & 0x00000000FFFFFFFF, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_LOW); writel(0, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_HIGH); #endif writel(((u64) desc->phys) >> 32, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_HIGH); writeb(IOAT_CHANCMD_START, ioat_chan->reg_base + IOAT_CHANCMD_OFFSET); } Loading Loading
drivers/dma/ioatdma.c +4 −6 Original line number Diff line number Diff line Loading @@ -608,13 +608,11 @@ static void ioat_start_null_desc(struct ioat_dma_chan *ioat_chan) list_add_tail(&desc->node, &ioat_chan->used_desc); spin_unlock_bh(&ioat_chan->desc_lock); #if (BITS_PER_LONG == 64) writeq(desc->phys, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET); #else writel((u32) desc->phys, writel(((u64) desc->phys) & 0x00000000FFFFFFFF, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_LOW); writel(0, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_HIGH); #endif writel(((u64) desc->phys) >> 32, ioat_chan->reg_base + IOAT_CHAINADDR_OFFSET_HIGH); writeb(IOAT_CHANCMD_START, ioat_chan->reg_base + IOAT_CHANCMD_OFFSET); } Loading