Loading arch/x86/boot/a20.c +41 −34 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ * * Copyright (C) 1991, 1992 Linus Torvalds * Copyright 2007-2008 rPath, Inc. - All Rights Reserved * Copyright 2009 Intel Corporation * * This file is part of the Linux kernel, and is made available under * the terms of the GNU General Public License version 2. Loading @@ -15,16 +16,23 @@ #include "boot.h" #define MAX_8042_LOOPS 100000 #define MAX_8042_FF 32 static int empty_8042(void) { u8 status; int loops = MAX_8042_LOOPS; int ffs = MAX_8042_FF; while (loops--) { io_delay(); status = inb(0x64); if (status == 0xff) { /* FF is a plausible, but very unlikely status */ if (!--ffs) return -1; /* Assume no KBC present */ } if (status & 1) { /* Read and discard input data */ io_delay(); Loading Loading @@ -118,18 +126,14 @@ static void enable_a20_fast(void) int enable_a20(void) { #if defined(CONFIG_X86_ELAN) /* Elan croaks if we try to touch the KBC */ enable_a20_fast(); while (!a20_test_long()) ; return 0; #elif defined(CONFIG_X86_VOYAGER) #ifdef CONFIG_X86_VOYAGER /* On Voyager, a20_test() is unsafe? */ enable_a20_kbc(); return 0; #else int loops = A20_ENABLE_LOOPS; int kbc_err; while (loops--) { /* First, check to see if A20 is already enabled (legacy free, etc.) */ Loading @@ -142,13 +146,16 @@ int enable_a20(void) return 0; /* Try enabling A20 through the keyboard controller */ empty_8042(); kbc_err = empty_8042(); if (a20_test_short()) return 0; /* BIOS worked, but with delayed reaction */ if (!kbc_err) { enable_a20_kbc(); if (a20_test_long()) return 0; } /* Finally, try enabling the "fast A20 gate" */ enable_a20_fast(); Loading arch/x86/include/asm/page.h +0 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,6 @@ typedef struct { pgdval_t pgd; } pgd_t; typedef struct { pgprotval_t pgprot; } pgprot_t; extern int page_is_ram(unsigned long pagenr); extern int pagerange_is_ram(unsigned long start, unsigned long end); extern int devmem_is_allowed(unsigned long pagenr); extern void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot); Loading arch/x86/include/asm/paravirt.h +2 −15 Original line number Diff line number Diff line Loading @@ -1431,14 +1431,7 @@ static inline void arch_leave_lazy_cpu_mode(void) PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); } static inline void arch_flush_lazy_cpu_mode(void) { if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) { arch_leave_lazy_cpu_mode(); arch_enter_lazy_cpu_mode(); } } void arch_flush_lazy_cpu_mode(void); #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE static inline void arch_enter_lazy_mmu_mode(void) Loading @@ -1451,13 +1444,7 @@ static inline void arch_leave_lazy_mmu_mode(void) PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); } static inline void arch_flush_lazy_mmu_mode(void) { if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) { arch_leave_lazy_mmu_mode(); arch_enter_lazy_mmu_mode(); } } void arch_flush_lazy_mmu_mode(void); static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, unsigned long phys, pgprot_t flags) Loading arch/x86/kernel/hpet.c +2 −0 Original line number Diff line number Diff line Loading @@ -269,6 +269,8 @@ static void hpet_set_mode(enum clock_event_mode mode, now = hpet_readl(HPET_COUNTER); cmp = now + (unsigned long) delta; cfg = hpet_readl(HPET_Tn_CFG(timer)); /* Make sure we use edge triggered interrupts */ cfg &= ~HPET_TN_LEVEL; cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL | HPET_TN_32BIT; hpet_writel(cfg, HPET_Tn_CFG(timer)); Loading arch/x86/kernel/paravirt.c +26 −0 Original line number Diff line number Diff line Loading @@ -286,6 +286,32 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void) return __get_cpu_var(paravirt_lazy_mode); } void arch_flush_lazy_mmu_mode(void) { preempt_disable(); if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { WARN_ON(preempt_count() == 1); arch_leave_lazy_mmu_mode(); arch_enter_lazy_mmu_mode(); } preempt_enable(); } void arch_flush_lazy_cpu_mode(void) { preempt_disable(); if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { WARN_ON(preempt_count() == 1); arch_leave_lazy_cpu_mode(); arch_enter_lazy_cpu_mode(); } preempt_enable(); } struct pv_info pv_info = { .name = "bare hardware", .paravirt_enabled = 0, Loading Loading
arch/x86/boot/a20.c +41 −34 Original line number Diff line number Diff line Loading @@ -2,6 +2,7 @@ * * Copyright (C) 1991, 1992 Linus Torvalds * Copyright 2007-2008 rPath, Inc. - All Rights Reserved * Copyright 2009 Intel Corporation * * This file is part of the Linux kernel, and is made available under * the terms of the GNU General Public License version 2. Loading @@ -15,16 +16,23 @@ #include "boot.h" #define MAX_8042_LOOPS 100000 #define MAX_8042_FF 32 static int empty_8042(void) { u8 status; int loops = MAX_8042_LOOPS; int ffs = MAX_8042_FF; while (loops--) { io_delay(); status = inb(0x64); if (status == 0xff) { /* FF is a plausible, but very unlikely status */ if (!--ffs) return -1; /* Assume no KBC present */ } if (status & 1) { /* Read and discard input data */ io_delay(); Loading Loading @@ -118,18 +126,14 @@ static void enable_a20_fast(void) int enable_a20(void) { #if defined(CONFIG_X86_ELAN) /* Elan croaks if we try to touch the KBC */ enable_a20_fast(); while (!a20_test_long()) ; return 0; #elif defined(CONFIG_X86_VOYAGER) #ifdef CONFIG_X86_VOYAGER /* On Voyager, a20_test() is unsafe? */ enable_a20_kbc(); return 0; #else int loops = A20_ENABLE_LOOPS; int kbc_err; while (loops--) { /* First, check to see if A20 is already enabled (legacy free, etc.) */ Loading @@ -142,13 +146,16 @@ int enable_a20(void) return 0; /* Try enabling A20 through the keyboard controller */ empty_8042(); kbc_err = empty_8042(); if (a20_test_short()) return 0; /* BIOS worked, but with delayed reaction */ if (!kbc_err) { enable_a20_kbc(); if (a20_test_long()) return 0; } /* Finally, try enabling the "fast A20 gate" */ enable_a20_fast(); Loading
arch/x86/include/asm/page.h +0 −1 Original line number Diff line number Diff line Loading @@ -57,7 +57,6 @@ typedef struct { pgdval_t pgd; } pgd_t; typedef struct { pgprotval_t pgprot; } pgprot_t; extern int page_is_ram(unsigned long pagenr); extern int pagerange_is_ram(unsigned long start, unsigned long end); extern int devmem_is_allowed(unsigned long pagenr); extern void map_devmem(unsigned long pfn, unsigned long size, pgprot_t vma_prot); Loading
arch/x86/include/asm/paravirt.h +2 −15 Original line number Diff line number Diff line Loading @@ -1431,14 +1431,7 @@ static inline void arch_leave_lazy_cpu_mode(void) PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); } static inline void arch_flush_lazy_cpu_mode(void) { if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) { arch_leave_lazy_cpu_mode(); arch_enter_lazy_cpu_mode(); } } void arch_flush_lazy_cpu_mode(void); #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE static inline void arch_enter_lazy_mmu_mode(void) Loading @@ -1451,13 +1444,7 @@ static inline void arch_leave_lazy_mmu_mode(void) PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); } static inline void arch_flush_lazy_mmu_mode(void) { if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) { arch_leave_lazy_mmu_mode(); arch_enter_lazy_mmu_mode(); } } void arch_flush_lazy_mmu_mode(void); static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, unsigned long phys, pgprot_t flags) Loading
arch/x86/kernel/hpet.c +2 −0 Original line number Diff line number Diff line Loading @@ -269,6 +269,8 @@ static void hpet_set_mode(enum clock_event_mode mode, now = hpet_readl(HPET_COUNTER); cmp = now + (unsigned long) delta; cfg = hpet_readl(HPET_Tn_CFG(timer)); /* Make sure we use edge triggered interrupts */ cfg &= ~HPET_TN_LEVEL; cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL | HPET_TN_32BIT; hpet_writel(cfg, HPET_Tn_CFG(timer)); Loading
arch/x86/kernel/paravirt.c +26 −0 Original line number Diff line number Diff line Loading @@ -286,6 +286,32 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void) return __get_cpu_var(paravirt_lazy_mode); } void arch_flush_lazy_mmu_mode(void) { preempt_disable(); if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { WARN_ON(preempt_count() == 1); arch_leave_lazy_mmu_mode(); arch_enter_lazy_mmu_mode(); } preempt_enable(); } void arch_flush_lazy_cpu_mode(void) { preempt_disable(); if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { WARN_ON(preempt_count() == 1); arch_leave_lazy_cpu_mode(); arch_enter_lazy_cpu_mode(); } preempt_enable(); } struct pv_info pv_info = { .name = "bare hardware", .paravirt_enabled = 0, Loading