Commit 6bda2c8b authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86: remove subarchitecture support 



Remove the 32-bit subarchitecture support code.

All subarchitectures but Voyager have been converted. Voyager will be
done later or will be removed.

Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 1164dd00

arch/x86/Makefile

+0 −21
Original line number Diff line number Diff line
@@ -102,24 +102,6 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables 
# prevent gcc from generating any FP code by mistake

KBUILD_CFLAGS += $(call cc-option,-mno-sse -mno-mmx -mno-sse2 -mno-3dnow,)



###

# Sub architecture support

# fcore-y is linked before mcore-y files.



# Default subarch .c files

mcore-y  := arch/x86/mach-default/



# Voyager subarch support

mflags-$(CONFIG_X86_VOYAGER)	:= -Iarch/x86/include/asm/mach-voyager

mcore-$(CONFIG_X86_VOYAGER)	:= arch/x86/mach-voyager/



# default subarch .h files

mflags-y += -Iarch/x86/include/asm/mach-default



# 64 bit does not support subarch support - clear sub arch variables

fcore-$(CONFIG_X86_64)  :=

mcore-$(CONFIG_X86_64)  :=



KBUILD_CFLAGS += $(mflags-y)

KBUILD_AFLAGS += $(mflags-y)
@@ -145,9 +127,6 @@ core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/ 
core-y += arch/x86/kernel/

core-y += arch/x86/mm/



# Remaining sub architecture files

core-y += $(mcore-y)



core-y += arch/x86/crypto/

core-y += arch/x86/vdso/

core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/

arch/x86/include/asm/apic.h

+2 −0
Original line number Diff line number Diff line
@@ -215,6 +215,7 @@ static inline void disable_local_APIC(void) { } 
#define	SET_APIC_ID(x)		(apic->set_apic_id(x))

#else



#ifdef CONFIG_X86_LOCAL_APIC

static inline unsigned default_get_apic_id(unsigned long x)

{

	unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
@@ -224,6 +225,7 @@ static inline unsigned default_get_apic_id(unsigned long x) 
	else

		return (x >> 24) & 0x0F;

}

#endif



#endif

arch/x86/kernel/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ obj-$(CONFIG_SMP) += setup_percpu.o 
obj-$(CONFIG_X86_64_SMP)	+= tsc_sync.o

obj-$(CONFIG_X86_TRAMPOLINE)	+= trampoline_$(BITS).o

obj-$(CONFIG_X86_MPPARSE)	+= mpparse.o

obj-$(CONFIG_X86_LOCAL_APIC)	+= apic.o nmi.o

obj-$(CONFIG_X86_LOCAL_APIC)	+= apic.o nmi.o ipi.o

obj-$(CONFIG_X86_IO_APIC)	+= io_apic.o

obj-$(CONFIG_X86_REBOOTFIXUPS)	+= reboot_fixups_32.o

obj-$(CONFIG_DYNAMIC_FTRACE)	+= ftrace.o

arch/x86/kernel/io_apic.c

+0 −17
Original line number Diff line number Diff line
@@ -797,23 +797,6 @@ static void clear_IO_APIC (void) 
			clear_IO_APIC_pin(apic, pin);

}



#if !defined(CONFIG_SMP) && defined(CONFIG_X86_32)

void default_send_IPI_self(int vector)

{

	unsigned int cfg;



	/*

	 * Wait for idle.

	 */

	apic_wait_icr_idle();

	cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | apic->dest_logical;

	/*

	 * Send the IPI. The write to APIC_ICR fires this off.

	 */

	apic_write(APIC_ICR, cfg);

}

#endif /* !CONFIG_SMP && CONFIG_X86_32*/



#ifdef CONFIG_X86_32

/*

 * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to

arch/x86/kernel/probe_32.c

+163 −0
Original line number Diff line number Diff line
@@ -32,6 +32,26 @@ 
#include <asm/genapic.h>

#include <asm/ipi.h>



#include <linux/smp.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <asm/acpi.h>

#include <asm/arch_hooks.h>

#include <asm/e820.h>

#include <asm/setup.h>



#include <asm/genapic.h>



#ifdef CONFIG_HOTPLUG_CPU

#define DEFAULT_SEND_IPI	(1)

#else

#define DEFAULT_SEND_IPI	(0)

#endif



int no_broadcast = DEFAULT_SEND_IPI;



#ifdef CONFIG_X86_LOCAL_APIC



static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)

{

	/*
@@ -246,3 +266,146 @@ int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 
	}

	return 0;

}



#endif /* CONFIG_X86_LOCAL_APIC */



/**

 * pre_intr_init_hook - initialisation prior to setting up interrupt vectors

 *

 * Description:

 *	Perform any necessary interrupt initialisation prior to setting up

 *	the "ordinary" interrupt call gates.  For legacy reasons, the ISA

 *	interrupts should be initialised here if the machine emulates a PC

 *	in any way.

 **/

void __init pre_intr_init_hook(void)

{

	if (x86_quirks->arch_pre_intr_init) {

		if (x86_quirks->arch_pre_intr_init())

			return;

	}

	init_ISA_irqs();

}



/**

 * intr_init_hook - post gate setup interrupt initialisation

 *

 * Description:

 *	Fill in any interrupts that may have been left out by the general

 *	init_IRQ() routine.  interrupts having to do with the machine rather

 *	than the devices on the I/O bus (like APIC interrupts in intel MP

 *	systems) are started here.

 **/

void __init intr_init_hook(void)

{

	if (x86_quirks->arch_intr_init) {

		if (x86_quirks->arch_intr_init())

			return;

	}

}



/**

 * pre_setup_arch_hook - hook called prior to any setup_arch() execution

 *

 * Description:

 *	generally used to activate any machine specific identification

 *	routines that may be needed before setup_arch() runs.  On Voyager

 *	this is used to get the board revision and type.

 **/

void __init pre_setup_arch_hook(void)

{

}



/**

 * trap_init_hook - initialise system specific traps

 *

 * Description:

 *	Called as the final act of trap_init().  Used in VISWS to initialise

 *	the various board specific APIC traps.

 **/

void __init trap_init_hook(void)

{

	if (x86_quirks->arch_trap_init) {

		if (x86_quirks->arch_trap_init())

			return;

	}

}



static struct irqaction irq0  = {

	.handler = timer_interrupt,

	.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,

	.mask = CPU_MASK_NONE,

	.name = "timer"

};



/**

 * pre_time_init_hook - do any specific initialisations before.

 *

 **/

void __init pre_time_init_hook(void)

{

	if (x86_quirks->arch_pre_time_init)

		x86_quirks->arch_pre_time_init();

}



/**

 * time_init_hook - do any specific initialisations for the system timer.

 *

 * Description:

 *	Must plug the system timer interrupt source at HZ into the IRQ listed

 *	in irq_vectors.h:TIMER_IRQ

 **/

void __init time_init_hook(void)

{

	if (x86_quirks->arch_time_init) {

		/*

		 * A nonzero return code does not mean failure, it means

		 * that the architecture quirk does not want any

		 * generic (timer) setup to be performed after this:

		 */

		if (x86_quirks->arch_time_init())

			return;

	}



	irq0.mask = cpumask_of_cpu(0);

	setup_irq(0, &irq0);

}



#ifdef CONFIG_MCA

/**

 * mca_nmi_hook - hook into MCA specific NMI chain

 *

 * Description:

 *	The MCA (Microchannel Architecture) has an NMI chain for NMI sources

 *	along the MCA bus.  Use this to hook into that chain if you will need

 *	it.

 **/

void mca_nmi_hook(void)

{

	/*

	 * If I recall correctly, there's a whole bunch of other things that

	 * we can do to check for NMI problems, but that's all I know about

	 * at the moment.

	 */

	pr_warning("NMI generated from unknown source!\n");

}

#endif



static __init int no_ipi_broadcast(char *str)

{

	get_option(&str, &no_broadcast);

	pr_info("Using %s mode\n",

		no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");

	return 1;

}

__setup("no_ipi_broadcast=", no_ipi_broadcast);



static int __init print_ipi_mode(void)

{

	pr_info("Using IPI %s mode\n",

		no_broadcast ? "No-Shortcut" : "Shortcut");

	return 0;

}



late_initcall(print_ipi_mode);