Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c +6 −12 Original line number Diff line number Diff line Loading @@ -929,11 +929,13 @@ nvc0_grctx_generate_tpcid(struct nvc0_graph_priv *priv) void nvc0_grctx_generate_r406028(struct nvc0_graph_priv *priv) { u32 tmp = 0, i; u32 tmp[GPC_MAX / 8] = {}, i = 0; for (i = 0; i < priv->gpc_nr; i++) tmp |= priv->tpc_nr[i] << (i * 4); nv_wr32(priv, 0x406028, tmp); nv_wr32(priv, 0x405870, tmp); tmp[i / 8] |= priv->tpc_nr[i] << ((i % 8) * 4); for (i = 0; i < 4; i++) { nv_wr32(priv, 0x406028 + (i * 4), tmp[i]); nv_wr32(priv, 0x405870 + (i * 4), tmp[i]); } } void Loading Loading @@ -1069,14 +1071,6 @@ nvc0_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) nvc0_grctx_generate_tpcid(priv); nvc0_grctx_generate_r406028(priv); nv_wr32(priv, 0x40602c, 0x00000000); nv_wr32(priv, 0x405874, 0x00000000); nv_wr32(priv, 0x406030, 0x00000000); nv_wr32(priv, 0x405878, 0x00000000); nv_wr32(priv, 0x406034, 0x00000000); nv_wr32(priv, 0x40587c, 0x00000000); nvc0_grctx_generate_r4060a8(priv); nvc0_grctx_generate_r418bb8(priv); nvc0_grctx_generate_r406800(priv); Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c +0 −8 Original line number Diff line number Diff line Loading @@ -231,14 +231,6 @@ nvd7_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) nvc0_grctx_generate_tpcid(priv); nvc0_grctx_generate_r406028(priv); nv_wr32(priv, 0x40602c, 0x00000000); nv_wr32(priv, 0x405874, 0x00000000); nv_wr32(priv, 0x406030, 0x00000000); nv_wr32(priv, 0x405878, 0x00000000); nv_wr32(priv, 0x406034, 0x00000000); nv_wr32(priv, 0x40587c, 0x00000000); nvc0_grctx_generate_r4060a8(priv); nve4_grctx_generate_r418bb8(priv); nvc0_grctx_generate_r406800(priv); Loading drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +0 −8 Original line number Diff line number Diff line Loading @@ -937,14 +937,6 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) nvc0_grctx_generate_tpcid(priv); nvc0_grctx_generate_r406028(priv); nv_wr32(priv, 0x40602c, 0x00000000); nv_wr32(priv, 0x405874, 0x00000000); nv_wr32(priv, 0x406030, 0x00000000); nv_wr32(priv, 0x405878, 0x00000000); nv_wr32(priv, 0x406034, 0x00000000); nv_wr32(priv, 0x40587c, 0x00000000); nve4_grctx_generate_r418bb8(priv); nvc0_grctx_generate_r406800(priv); Loading Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c +6 −12 Original line number Diff line number Diff line Loading @@ -929,11 +929,13 @@ nvc0_grctx_generate_tpcid(struct nvc0_graph_priv *priv) void nvc0_grctx_generate_r406028(struct nvc0_graph_priv *priv) { u32 tmp = 0, i; u32 tmp[GPC_MAX / 8] = {}, i = 0; for (i = 0; i < priv->gpc_nr; i++) tmp |= priv->tpc_nr[i] << (i * 4); nv_wr32(priv, 0x406028, tmp); nv_wr32(priv, 0x405870, tmp); tmp[i / 8] |= priv->tpc_nr[i] << ((i % 8) * 4); for (i = 0; i < 4; i++) { nv_wr32(priv, 0x406028 + (i * 4), tmp[i]); nv_wr32(priv, 0x405870 + (i * 4), tmp[i]); } } void Loading Loading @@ -1069,14 +1071,6 @@ nvc0_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) nvc0_grctx_generate_tpcid(priv); nvc0_grctx_generate_r406028(priv); nv_wr32(priv, 0x40602c, 0x00000000); nv_wr32(priv, 0x405874, 0x00000000); nv_wr32(priv, 0x406030, 0x00000000); nv_wr32(priv, 0x405878, 0x00000000); nv_wr32(priv, 0x406034, 0x00000000); nv_wr32(priv, 0x40587c, 0x00000000); nvc0_grctx_generate_r4060a8(priv); nvc0_grctx_generate_r418bb8(priv); nvc0_grctx_generate_r406800(priv); Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd7.c +0 −8 Original line number Diff line number Diff line Loading @@ -231,14 +231,6 @@ nvd7_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) nvc0_grctx_generate_tpcid(priv); nvc0_grctx_generate_r406028(priv); nv_wr32(priv, 0x40602c, 0x00000000); nv_wr32(priv, 0x405874, 0x00000000); nv_wr32(priv, 0x406030, 0x00000000); nv_wr32(priv, 0x405878, 0x00000000); nv_wr32(priv, 0x406034, 0x00000000); nv_wr32(priv, 0x40587c, 0x00000000); nvc0_grctx_generate_r4060a8(priv); nve4_grctx_generate_r418bb8(priv); nvc0_grctx_generate_r406800(priv); Loading
drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +0 −8 Original line number Diff line number Diff line Loading @@ -937,14 +937,6 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) nvc0_grctx_generate_tpcid(priv); nvc0_grctx_generate_r406028(priv); nv_wr32(priv, 0x40602c, 0x00000000); nv_wr32(priv, 0x405874, 0x00000000); nv_wr32(priv, 0x406030, 0x00000000); nv_wr32(priv, 0x405878, 0x00000000); nv_wr32(priv, 0x406034, 0x00000000); nv_wr32(priv, 0x40587c, 0x00000000); nve4_grctx_generate_r418bb8(priv); nvc0_grctx_generate_r406800(priv); Loading