Commit 5a3e2b82 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915/gt: Tidy up rps irq handler to use intel_gt 



Since the rps is tied to its intel_gt, use that backpointer to find the
right engine rather than delving into i915.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191027175505.25470-1-chris@chris-wilson.co.uk
parent c8c197d4

drivers/gpu/drm/i915/gt/intel_rps.c

+3 −5
Original line number Diff line number Diff line
@@ -1555,11 +1555,9 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir) 


void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)

{

	struct drm_i915_private *i915 = rps_to_i915(rps);



	if (pm_iir & rps->pm_events) {

	struct intel_gt *gt = rps_to_gt(rps);



	if (pm_iir & rps->pm_events) {

		spin_lock(&gt->irq_lock);

		gen6_gt_pm_mask_irq(gt, pm_iir & rps->pm_events);

		rps->pm_iir |= pm_iir & rps->pm_events;
@@ -1567,11 +1565,11 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir) 
		spin_unlock(&gt->irq_lock);

	}



	if (INTEL_GEN(i915) >= 8)

	if (INTEL_GEN(gt->i915) >= 8)

		return;



	if (pm_iir & PM_VEBOX_USER_INTERRUPT)

		intel_engine_breadcrumbs_irq(i915->engine[VECS0]);

		intel_engine_breadcrumbs_irq(gt->engine[VECS0]);



	if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT)

		DRM_DEBUG("Command parser error, pm_iir 0x%08x\n", pm_iir);