Loading arch/sh/mm/cache-sh5.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -563,7 +563,7 @@ static void sh5_flush_cache_page(void *args) static void sh5_flush_dcache_page(void *page) static void sh5_flush_dcache_page(void *page) { { sh64_dcache_purge_phy_page(page_to_phys(page)); sh64_dcache_purge_phy_page(page_to_phys((struct page *)page)); wmb(); wmb(); } } Loading arch/sh/mm/cache.c +5 −1 Original line number Original line Diff line number Diff line Loading @@ -277,7 +277,11 @@ static void __init emit_cache_params(void) void __init cpu_cache_init(void) void __init cpu_cache_init(void) { { unsigned int cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE); unsigned int cache_disabled = 0; #ifdef CCR cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE); #endif compute_alias(&boot_cpu_data.icache); compute_alias(&boot_cpu_data.icache); compute_alias(&boot_cpu_data.dcache); compute_alias(&boot_cpu_data.dcache); Loading Loading
arch/sh/mm/cache-sh5.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -563,7 +563,7 @@ static void sh5_flush_cache_page(void *args) static void sh5_flush_dcache_page(void *page) static void sh5_flush_dcache_page(void *page) { { sh64_dcache_purge_phy_page(page_to_phys(page)); sh64_dcache_purge_phy_page(page_to_phys((struct page *)page)); wmb(); wmb(); } } Loading
arch/sh/mm/cache.c +5 −1 Original line number Original line Diff line number Diff line Loading @@ -277,7 +277,11 @@ static void __init emit_cache_params(void) void __init cpu_cache_init(void) void __init cpu_cache_init(void) { { unsigned int cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE); unsigned int cache_disabled = 0; #ifdef CCR cache_disabled = !(__raw_readl(CCR) & CCR_CACHE_ENABLE); #endif compute_alias(&boot_cpu_data.icache); compute_alias(&boot_cpu_data.icache); compute_alias(&boot_cpu_data.dcache); compute_alias(&boot_cpu_data.dcache); Loading