Loading arch/x86/kernel/cpu/amd.c +0 −3 Original line number Diff line number Diff line Loading @@ -266,9 +266,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) if (cpu_has_xmm2) set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC); if (c->x86 == 0x10) amd_enable_pci_ext_cfg(c); } static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c, unsigned int size) Loading arch/x86/kernel/cpu/amd_64.c +0 −4 Original line number Diff line number Diff line Loading @@ -6,7 +6,6 @@ #include <asm/cacheflush.h> #include <mach_apic.h> #include "cpu.h" extern int __cpuinit get_model_name(struct cpuinfo_x86 *c); extern void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c); Loading Loading @@ -187,9 +186,6 @@ void __cpuinit init_amd(struct cpuinfo_x86 *c) if (c->x86 == 0x10) fam10h_check_enable_mmcfg(); if (c->x86 == 0x10) amd_enable_pci_ext_cfg(c); if (c == &boot_cpu_data && c->x86 >= 0xf && c->x86 <= 0x11) { unsigned long long tseg; Loading arch/x86/kernel/cpu/cpu.h +0 −2 Original line number Diff line number Diff line Loading @@ -39,5 +39,3 @@ extern int get_model_name(struct cpuinfo_x86 *c); extern void display_cacheinfo(struct cpuinfo_x86 *c); #endif /* CONFIG_X86_32 */ extern void __cpuinit amd_enable_pci_ext_cfg(struct cpuinfo_x86 *c); arch/x86/kernel/setup.c +0 −13 Original line number Diff line number Diff line Loading @@ -137,16 +137,3 @@ void __init setup_per_cpu_areas(void) } #endif #define ENABLE_CF8_EXT_CFG (1ULL << 46) void __cpuinit amd_enable_pci_ext_cfg(struct cpuinfo_x86 *c) { u64 reg; rdmsrl(MSR_AMD64_NB_CFG, reg); if (!(reg & ENABLE_CF8_EXT_CFG)) { reg |= ENABLE_CF8_EXT_CFG; wrmsrl(MSR_AMD64_NB_CFG, reg); } set_cpu_cap(c, X86_FEATURE_PCI_EXT_CFG); } arch/x86/pci/Makefile_32 +1 −0 Original line number Diff line number Diff line Loading @@ -22,3 +22,4 @@ pci-$(CONFIG_X86_NUMAQ) := numa.o irq.o pci-$(CONFIG_NUMA) += mp_bus_to_node.o obj-y += $(pci-y) common.o early.o obj-y += amd_bus.o Loading
arch/x86/kernel/cpu/amd.c +0 −3 Original line number Diff line number Diff line Loading @@ -266,9 +266,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) if (cpu_has_xmm2) set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC); if (c->x86 == 0x10) amd_enable_pci_ext_cfg(c); } static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c, unsigned int size) Loading
arch/x86/kernel/cpu/amd_64.c +0 −4 Original line number Diff line number Diff line Loading @@ -6,7 +6,6 @@ #include <asm/cacheflush.h> #include <mach_apic.h> #include "cpu.h" extern int __cpuinit get_model_name(struct cpuinfo_x86 *c); extern void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c); Loading Loading @@ -187,9 +186,6 @@ void __cpuinit init_amd(struct cpuinfo_x86 *c) if (c->x86 == 0x10) fam10h_check_enable_mmcfg(); if (c->x86 == 0x10) amd_enable_pci_ext_cfg(c); if (c == &boot_cpu_data && c->x86 >= 0xf && c->x86 <= 0x11) { unsigned long long tseg; Loading
arch/x86/kernel/cpu/cpu.h +0 −2 Original line number Diff line number Diff line Loading @@ -39,5 +39,3 @@ extern int get_model_name(struct cpuinfo_x86 *c); extern void display_cacheinfo(struct cpuinfo_x86 *c); #endif /* CONFIG_X86_32 */ extern void __cpuinit amd_enable_pci_ext_cfg(struct cpuinfo_x86 *c);
arch/x86/kernel/setup.c +0 −13 Original line number Diff line number Diff line Loading @@ -137,16 +137,3 @@ void __init setup_per_cpu_areas(void) } #endif #define ENABLE_CF8_EXT_CFG (1ULL << 46) void __cpuinit amd_enable_pci_ext_cfg(struct cpuinfo_x86 *c) { u64 reg; rdmsrl(MSR_AMD64_NB_CFG, reg); if (!(reg & ENABLE_CF8_EXT_CFG)) { reg |= ENABLE_CF8_EXT_CFG; wrmsrl(MSR_AMD64_NB_CFG, reg); } set_cpu_cap(c, X86_FEATURE_PCI_EXT_CFG); }
arch/x86/pci/Makefile_32 +1 −0 Original line number Diff line number Diff line Loading @@ -22,3 +22,4 @@ pci-$(CONFIG_X86_NUMAQ) := numa.o irq.o pci-$(CONFIG_NUMA) += mp_bus_to_node.o obj-y += $(pci-y) common.o early.o obj-y += amd_bus.o