Commit 3a24a3cb authored by Sebastian Reichel's avatar Sebastian Reichel Committed by Tony Lindgren
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ARM: dts: omap3 clocks: simplify ssi aliases 



update aliases for the ssi clocks ssi_ssr_fck, ssi_sst_fck and ssi_ick
to make them consistent for omap34xx and omap36xx. This makes it
possible to reference the clocks from generic omap3 dts files.

Signed-off-by: default avatarSebastian Reichel <sre@debian.org>
Acked-by: default avatarTero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 3a6ae3c5

arch/arm/boot/dts/omap3430es1-clocks.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -82,16 +82,16 @@ ssi_ssr_div_fck_3430es1: ssi_ssr_div_fck_3430es1 { 
		ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;

	};



	ssi_ssr_fck_3430es1: ssi_ssr_fck_3430es1 {

	ssi_ssr_fck: ssi_ssr_fck_3430es1 {

		#clock-cells = <0>;

		compatible = "ti,composite-clock";

		clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;

	};



	ssi_sst_fck_3430es1: ssi_sst_fck_3430es1 {

	ssi_sst_fck: ssi_sst_fck_3430es1 {

		#clock-cells = <0>;

		compatible = "fixed-factor-clock";

		clocks = <&ssi_ssr_fck_3430es1>;

		clocks = <&ssi_ssr_fck>;

		clock-mult = <1>;

		clock-div = <2>;

	};
@@ -120,7 +120,7 @@ ssi_l4_ick: ssi_l4_ick { 
		clock-div = <1>;

	};



	ssi_ick_3430es1: ssi_ick_3430es1 {

	ssi_ick: ssi_ick_3430es1 {

		#clock-cells = <0>;

		compatible = "ti,omap3-no-wait-interface-clock";

		clocks = <&ssi_l4_ick>;
@@ -203,6 +203,6 @@ core_l4_clkdm: core_l4_clkdm { 
			 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,

			 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,

			 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,

			 <&fshostusb_fck>, <&fac_ick>, <&ssi_ick_3430es1>;

			 <&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;

	};

};

arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -25,16 +25,16 @@ ssi_ssr_div_fck_3430es2: ssi_ssr_div_fck_3430es2 { 
		ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;

	};



	ssi_ssr_fck_3430es2: ssi_ssr_fck_3430es2 {

	ssi_ssr_fck: ssi_ssr_fck_3430es2 {

		#clock-cells = <0>;

		compatible = "ti,composite-clock";

		clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;

	};



	ssi_sst_fck_3430es2: ssi_sst_fck_3430es2 {

	ssi_sst_fck: ssi_sst_fck_3430es2 {

		#clock-cells = <0>;

		compatible = "fixed-factor-clock";

		clocks = <&ssi_ssr_fck_3430es2>;

		clocks = <&ssi_ssr_fck>;

		clock-mult = <1>;

		clock-div = <2>;

	};
@@ -55,7 +55,7 @@ ssi_l4_ick: ssi_l4_ick { 
		clock-div = <1>;

	};



	ssi_ick_3430es2: ssi_ick_3430es2 {

	ssi_ick: ssi_ick_3430es2 {

		#clock-cells = <0>;

		compatible = "ti,omap3-ssi-interface-clock";

		clocks = <&ssi_l4_ick>;
@@ -193,6 +193,6 @@ core_l4_clkdm: core_l4_clkdm { 
			 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,

			 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,

			 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,

			 <&ssi_ick_3430es2>;

			 <&ssi_ick>;

	};

};