Loading arch/arm64/mm/cache.S +6 −1 Original line number Diff line number Diff line Loading @@ -143,7 +143,12 @@ __dma_clean_range: dcache_line_size x2, x3 sub x3, x2, #1 bic x0, x0, x3 1: alternative_insn "dc cvac, x0", "dc civac, x0", ARM64_WORKAROUND_CLEAN_CACHE 1: alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE dc cvac, x0 alternative_else dc civac, x0 alternative_endif add x0, x0, x2 cmp x0, x1 b.lo 1b Loading Loading
arch/arm64/mm/cache.S +6 −1 Original line number Diff line number Diff line Loading @@ -143,7 +143,12 @@ __dma_clean_range: dcache_line_size x2, x3 sub x3, x2, #1 bic x0, x0, x3 1: alternative_insn "dc cvac, x0", "dc civac, x0", ARM64_WORKAROUND_CLEAN_CACHE 1: alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE dc cvac, x0 alternative_else dc civac, x0 alternative_endif add x0, x0, x2 cmp x0, x1 b.lo 1b Loading