Loading arch/blackfin/lib/outs.S +12 −4 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ .align 2 ENTRY(_outsl) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -20,10 +22,12 @@ ENTRY(_outsl) LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; .Llong_loop_s: R0 = [P1++]; .Llong_loop_e: [P0] = R0; RTS; 1: RTS; ENDPROC(_outsl) ENTRY(_outsw) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -31,10 +35,12 @@ ENTRY(_outsw) LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; .Lword_loop_s: R0 = W[P1++]; .Lword_loop_e: W[P0] = R0; RTS; 1: RTS; ENDPROC(_outsw) ENTRY(_outsb) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -42,10 +48,12 @@ ENTRY(_outsb) LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; .Lbyte_loop_s: R0 = B[P1++]; .Lbyte_loop_e: B[P0] = R0; RTS; 1: RTS; ENDPROC(_outsb) ENTRY(_outsw_8) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -56,5 +64,5 @@ ENTRY(_outsw_8) R0 = R0 << 8; R0 = R0 + R1; .Lword8_loop_e: W[P0] = R0; RTS; 1: RTS; ENDPROC(_outsw_8) arch/blackfin/mach-common/cache.S +2 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,8 @@ 1: .ifeqs "\flushins", BROK_FLUSH_INST \flushins [P0++]; nop; nop; 2: nop; .else 2: \flushins [P0++]; Loading Loading
arch/blackfin/lib/outs.S +12 −4 Original line number Diff line number Diff line Loading @@ -13,6 +13,8 @@ .align 2 ENTRY(_outsl) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -20,10 +22,12 @@ ENTRY(_outsl) LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; .Llong_loop_s: R0 = [P1++]; .Llong_loop_e: [P0] = R0; RTS; 1: RTS; ENDPROC(_outsl) ENTRY(_outsw) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -31,10 +35,12 @@ ENTRY(_outsw) LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; .Lword_loop_s: R0 = W[P1++]; .Lword_loop_e: W[P0] = R0; RTS; 1: RTS; ENDPROC(_outsw) ENTRY(_outsb) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -42,10 +48,12 @@ ENTRY(_outsb) LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; .Lbyte_loop_s: R0 = B[P1++]; .Lbyte_loop_e: B[P0] = R0; RTS; 1: RTS; ENDPROC(_outsb) ENTRY(_outsw_8) CC = R2 == 0; IF CC JUMP 1f; P0 = R0; /* P0 = port */ P1 = R1; /* P1 = address */ P2 = R2; /* P2 = count */ Loading @@ -56,5 +64,5 @@ ENTRY(_outsw_8) R0 = R0 << 8; R0 = R0 + R1; .Lword8_loop_e: W[P0] = R0; RTS; 1: RTS; ENDPROC(_outsw_8)
arch/blackfin/mach-common/cache.S +2 −0 Original line number Diff line number Diff line Loading @@ -58,6 +58,8 @@ 1: .ifeqs "\flushins", BROK_FLUSH_INST \flushins [P0++]; nop; nop; 2: nop; .else 2: \flushins [P0++]; Loading