Commit 18edef19 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: implement fw image related smu interface for Fiji. 



Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4be051ae

drivers/gpu/drm/amd/powerplay/smumgr/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
# Makefile for the 'smu manager' sub-component of powerplay.

# It provides the smu management services for the driver.



SMU_MGR = smumgr.o cz_smumgr.o tonga_smumgr.o fiji_smumgr.o \

SMU_MGR = smumgr.o cz_smumgr.o tonga_smumgr.o fiji_smumgr.o fiji_smc.o\

	  polaris10_smumgr.o iceland_smumgr.o polaris10_smc.o



AMD_PP_SMUMGR = $(addprefix $(AMD_PP_PATH)/smumgr/,$(SMU_MGR))

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c

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+2371 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.h

0 → 100644
+51 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2015 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */

#ifndef FIJI_SMC_H

#define FIJI_SMC_H



#include "smumgr.h"

#include "smu73.h"



struct fiji_pt_defaults {

	uint8_t   SviLoadLineEn;

	uint8_t   SviLoadLineVddC;

	uint8_t   TDC_VDDC_ThrottleReleaseLimitPerc;

	uint8_t   TDC_MAWt;

	uint8_t   TdcWaterfallCtl;

	uint8_t   DTEAmbientTempBase;

};



int fiji_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);

int fiji_populate_all_memory_levels(struct pp_hwmgr *hwmgr);

int fiji_init_smc_table(struct pp_hwmgr *hwmgr);

int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);

int fiji_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);

int fiji_update_sclk_threshold(struct pp_hwmgr *hwmgr);

uint32_t fiji_get_offsetof(uint32_t type, uint32_t member);

uint32_t fiji_get_mac_definition(uint32_t value);

int fiji_process_firmware_header(struct pp_hwmgr *hwmgr);

int fiji_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);

bool fiji_is_dpm_running(struct pp_hwmgr *hwmgr);



#endif

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+32 −5
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ 
#include "bif/bif_5_0_sh_mask.h"

#include "pp_debug.h"

#include "fiji_pwrvirus.h"

#include "fiji_smc.h"



#define AVFS_EN_MSB                                        1568

#define AVFS_EN_LSB                                        1568
@@ -219,17 +220,28 @@ bool fiji_is_smc_ram_running(struct pp_smumgr *smumgr) 
*/

int fiji_send_msg_to_smc(struct pp_smumgr *smumgr, uint16_t msg)

{

	int ret;



	if (!fiji_is_smc_ram_running(smumgr))

		return -1;



	if (1 != SMUM_READ_FIELD(smumgr->device, SMC_RESP_0, SMC_RESP)) {

		printk(KERN_ERR "Failed to send Previous Message.");



	SMUM_WAIT_FIELD_UNEQUAL(smumgr, SMC_RESP_0, SMC_RESP, 0);

	}



	ret = SMUM_READ_FIELD(smumgr->device, SMC_RESP_0, SMC_RESP);



	if (ret != 1)

		printk("\n failed to send pre message %x ret is %d \n",  msg, ret);



	cgs_write_register(smumgr->device, mmSMC_MESSAGE_0, msg);



	SMUM_WAIT_FIELD_UNEQUAL(smumgr, SMC_RESP_0, SMC_RESP, 0);



	ret = SMUM_READ_FIELD(smumgr->device, SMC_RESP_0, SMC_RESP);



	if (ret != 1)

		printk("\n failed to send message %x ret is %d \n",  msg, ret);



	return 0;

}
@@ -840,7 +852,7 @@ int fiji_avfs_event_mgr(struct pp_smumgr *smumgr, bool smu_started) 
	case AVFS_BTC_COMPLETED_RESTORED: /*S3 State - Post SMU Start*/

		priv->avfs.AvfsBtcStatus = AVFS_BTC_SMUMSG_ERROR;

		PP_ASSERT_WITH_CODE(0 == fiji_send_msg_to_smc(smumgr,

				PPSMC_MSG_VftTableIsValid),

				0x666),

				"[AVFS][fiji_avfs_event_mgr] SMU did not respond "

				"correctly to VftTableIsValid Msg",

				return -1;);
@@ -964,6 +976,7 @@ static int fiji_smu_init(struct pp_smumgr *smumgr) 
{

	struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);

	uint64_t mc_addr;

	int i;



	priv->header_buffer.data_size =

			((sizeof(struct SMU_DRAMData_TOC) / 4096) + 1) * 4096;
@@ -1001,6 +1014,9 @@ static int fiji_smu_init(struct pp_smumgr *smumgr) 


	priv->acpi_optimization = 1;



	for (i = 0; i < SMU73_MAX_LEVELS_GRAPHICS; i++)

		priv->activity_target[i] = 30;



	return 0;

}
@@ -1030,6 +1046,17 @@ static const struct pp_smumgr_func fiji_smu_funcs = { 
	.send_msg_to_smc_with_parameter = &fiji_send_msg_to_smc_with_parameter,

	.download_pptable_settings = NULL,

	.upload_pptable_settings = NULL,

	.update_smc_table = fiji_update_smc_table,

	.get_offsetof = fiji_get_offsetof,

	.process_firmware_header = fiji_process_firmware_header,

	.init_smc_table = fiji_init_smc_table,

	.update_sclk_threshold = fiji_update_sclk_threshold,

	.thermal_setup_fan_table = fiji_thermal_setup_fan_table,

	.populate_all_graphic_levels = fiji_populate_all_graphic_levels,

	.populate_all_memory_levels = fiji_populate_all_memory_levels,

	.get_mac_definition = fiji_get_mac_definition,

	.initialize_mc_reg_table = fiji_initialize_mc_reg_table,

	.is_dpm_running = fiji_is_dpm_running,

};



int fiji_smum_init(struct pp_smumgr *smumgr)

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.h

+17 −2
Original line number Diff line number Diff line
@@ -23,6 +23,10 @@ 
#ifndef _FIJI_SMUMANAGER_H_

#define _FIJI_SMUMANAGER_H_



#include "smu73_discrete.h"

#include <pp_endian.h>



#define SMC_RAM_END		0x40000



struct fiji_smu_avfs {

	enum AVFS_BTC_STATUS AvfsBtcStatus;
@@ -40,11 +44,22 @@ struct fiji_buffer_entry { 
struct fiji_smumgr {

	uint8_t        *header;

	uint8_t        *mec_image;



	uint32_t                             soft_regs_start;

	uint32_t                             dpm_table_start;

	uint32_t                             mc_reg_table_start;

	uint32_t                             fan_table_start;

	uint32_t                             arb_table_start;

	struct fiji_smu_avfs avfs;

	uint32_t        acpi_optimization;



	struct fiji_buffer_entry header_buffer;



	struct SMU73_Discrete_DpmTable       smc_state_table;

	struct SMU73_Discrete_Ulv            ulv_setting;

	struct SMU73_Discrete_PmFuses  power_tune_table;

	const struct fiji_pt_defaults  *power_tune_defaults;

	uint32_t        activity_target[SMU73_MAX_LEVELS_GRAPHICS];



};



int fiji_smum_init(struct pp_smumgr *smumgr);