Commit 185c0f26 authored by James Morris's avatar James Morris
Browse files

Merge commit 'v4.9-rc5' into next

parents eafb7b9d a25f0944

CREDITS

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@@ -1864,10 +1864,11 @@ S: The Netherlands 


N: Martin Kepplinger

E: martink@posteo.de

E: martin.kepplinger@theobroma-systems.com

E: martin.kepplinger@ginzinger.com

W: http://www.martinkepplinger.com

D: mma8452 accelerators iio driver

D: Kernel cleanups

D: pegasus_notetaker input driver

D: Kernel fixes and cleanups

S: Garnisonstraße 26

S: 4020 Linz

S: Austria

Documentation/ABI/testing/sysfs-devices-system-ibm-rtl

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What:           state

What:           /sys/devices/system/ibm_rtl/state

Date:           Sep 2010

KernelVersion:  2.6.37

Contact:        Vernon Mauery <vernux@us.ibm.com>
@@ -10,7 +10,7 @@ Description: The state file allows a means by which to change in and 
Users:          The ibm-prtm userspace daemon uses this interface.





What:           version

What:           /sys/devices/system/ibm_rtl/version

Date:           Sep 2010

KernelVersion:  2.6.37

Contact:        Vernon Mauery <vernux@us.ibm.com>

Documentation/device-mapper/dm-raid.txt

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@@ -309,3 +309,4 @@ Version History 
	with a reshape in progress.

1.9.0   Add support for RAID level takeover/reshape/region size

	and set size reduction.

1.9.1   Fix activation of existing RAID 4/10 mapped devices

Documentation/devicetree/bindings/clock/uniphier-clock.txt

+8 −8
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ Example: 
		reg = <0x61840000 0x4000>;



		clock {

			compatible = "socionext,uniphier-ld20-clock";

			compatible = "socionext,uniphier-ld11-clock";

			#clock-cells = <1>;

		};
@@ -43,8 +43,8 @@ Provided clocks: 
21: USB3 ch1 PHY1





Media I/O (MIO) clock

---------------------

Media I/O (MIO) clock, SD clock

-------------------------------



Required properties:

- compatible: should be one of the following:
@@ -52,10 +52,10 @@ Required properties: 
    "socionext,uniphier-ld4-mio-clock"  - for LD4 SoC.

    "socionext,uniphier-pro4-mio-clock" - for Pro4 SoC.

    "socionext,uniphier-sld8-mio-clock" - for sLD8 SoC.

    "socionext,uniphier-pro5-mio-clock" - for Pro5 SoC.

    "socionext,uniphier-pxs2-mio-clock" - for PXs2/LD6b SoC.

    "socionext,uniphier-pro5-sd-clock"  - for Pro5 SoC.

    "socionext,uniphier-pxs2-sd-clock"  - for PXs2/LD6b SoC.

    "socionext,uniphier-ld11-mio-clock" - for LD11 SoC.

    "socionext,uniphier-ld20-mio-clock" - for LD20 SoC.

    "socionext,uniphier-ld20-sd-clock"  - for LD20 SoC.

- #clock-cells: should be 1.



Example:
@@ -66,7 +66,7 @@ Example: 
		reg = <0x59810000 0x800>;



		clock {

			compatible = "socionext,uniphier-ld20-mio-clock";

			compatible = "socionext,uniphier-ld11-mio-clock";

			#clock-cells = <1>;

		};
@@ -112,7 +112,7 @@ Example: 
		reg = <0x59820000 0x200>;



		clock {

			compatible = "socionext,uniphier-ld20-peri-clock";

			compatible = "socionext,uniphier-ld11-peri-clock";

			#clock-cells = <1>;

		};

Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

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@@ -43,6 +43,9 @@ Optional properties: 
  reset signal present internally in some host controller IC designs.

  See Documentation/devicetree/bindings/reset/reset.txt for details.



* reset-names: request name for using "resets" property. Must be "reset".

	(It will be used together with "resets" property.)



* clocks: from common clock binding: handle to biu and ciu clocks for the

  bus interface unit clock and the card interface unit clock.
@@ -103,6 +106,8 @@ board specific portions as listed below. 
		interrupts = <0 75 0>;

		#address-cells = <1>;

		#size-cells = <0>;

		resets = <&rst 20>;

		reset-names = "reset";

	};



[board specific internal DMA resources]