Loading arch/arm/mach-s5p64x0/clock.c +6 −5 Original line number Diff line number Diff line Loading @@ -73,7 +73,7 @@ static const u32 clock_table[][3] = { {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, }; unsigned long s5p64x0_armclk_get_rate(struct clk *clk) static unsigned long s5p64x0_armclk_get_rate(struct clk *clk) { unsigned long rate = clk_get_rate(clk->parent); u32 clkdiv; Loading @@ -84,7 +84,8 @@ unsigned long s5p64x0_armclk_get_rate(struct clk *clk) return rate / (clkdiv + 1); } unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) static unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) { u32 iter; Loading @@ -96,7 +97,7 @@ unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) return clock_table[ARRAY_SIZE(clock_table) - 1][0]; } int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) static int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) { u32 round_tmp; u32 iter; Loading Loading @@ -148,7 +149,7 @@ int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) return 0; } struct clk_ops s5p64x0_clkarm_ops = { static struct clk_ops s5p64x0_clkarm_ops = { .get_rate = s5p64x0_armclk_get_rate, .set_rate = s5p64x0_armclk_set_rate, .round_rate = s5p64x0_armclk_round_rate, Loading @@ -173,7 +174,7 @@ struct clksrc_clk clk_dout_mpll = { .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 }, }; struct clk *clkset_hclk_low_list[] = { static struct clk *clkset_hclk_low_list[] = { &clk_mout_apll.clk, &clk_mout_mpll.clk, }; Loading arch/arm/mach-s5p64x0/dma.c +5 −5 Original line number Diff line number Diff line Loading @@ -38,7 +38,7 @@ static u64 dma_dmamask = DMA_BIT_MASK(32); u8 s5p6440_pdma_peri[] = { static u8 s5p6440_pdma_peri[] = { DMACH_UART0_RX, DMACH_UART0_TX, DMACH_UART1_RX, Loading @@ -63,12 +63,12 @@ u8 s5p6440_pdma_peri[] = { DMACH_SPI1_RX, }; struct dma_pl330_platdata s5p6440_pdma_pdata = { static struct dma_pl330_platdata s5p6440_pdma_pdata = { .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), .peri_id = s5p6440_pdma_peri, }; u8 s5p6450_pdma_peri[] = { static u8 s5p6450_pdma_peri[] = { DMACH_UART0_RX, DMACH_UART0_TX, DMACH_UART1_RX, Loading Loading @@ -103,12 +103,12 @@ u8 s5p6450_pdma_peri[] = { DMACH_UART5_TX, }; struct dma_pl330_platdata s5p6450_pdma_pdata = { static struct dma_pl330_platdata s5p6450_pdma_pdata = { .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), .peri_id = s5p6450_pdma_peri, }; struct amba_device s5p64x0_device_pdma = { static struct amba_device s5p64x0_device_pdma = { .dev = { .init_name = "dma-pl330", .dma_mask = &dma_dmamask, Loading arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h +0 −7 Original line number Diff line number Diff line Loading @@ -22,16 +22,9 @@ extern struct clksrc_clk clk_mout_epll; extern int s5p64x0_epll_enable(struct clk *clk, int enable); extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk); extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate); extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate); extern struct clk_ops s5p64x0_clkarm_ops; extern struct clksrc_clk clk_armclk; extern struct clksrc_clk clk_dout_mpll; extern struct clk *clkset_hclk_low_list[]; extern struct clksrc_sources clkset_hclk_low; extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); Loading Loading
arch/arm/mach-s5p64x0/clock.c +6 −5 Original line number Diff line number Diff line Loading @@ -73,7 +73,7 @@ static const u32 clock_table[][3] = { {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, }; unsigned long s5p64x0_armclk_get_rate(struct clk *clk) static unsigned long s5p64x0_armclk_get_rate(struct clk *clk) { unsigned long rate = clk_get_rate(clk->parent); u32 clkdiv; Loading @@ -84,7 +84,8 @@ unsigned long s5p64x0_armclk_get_rate(struct clk *clk) return rate / (clkdiv + 1); } unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) static unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) { u32 iter; Loading @@ -96,7 +97,7 @@ unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate) return clock_table[ARRAY_SIZE(clock_table) - 1][0]; } int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) static int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) { u32 round_tmp; u32 iter; Loading Loading @@ -148,7 +149,7 @@ int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) return 0; } struct clk_ops s5p64x0_clkarm_ops = { static struct clk_ops s5p64x0_clkarm_ops = { .get_rate = s5p64x0_armclk_get_rate, .set_rate = s5p64x0_armclk_set_rate, .round_rate = s5p64x0_armclk_round_rate, Loading @@ -173,7 +174,7 @@ struct clksrc_clk clk_dout_mpll = { .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 }, }; struct clk *clkset_hclk_low_list[] = { static struct clk *clkset_hclk_low_list[] = { &clk_mout_apll.clk, &clk_mout_mpll.clk, }; Loading
arch/arm/mach-s5p64x0/dma.c +5 −5 Original line number Diff line number Diff line Loading @@ -38,7 +38,7 @@ static u64 dma_dmamask = DMA_BIT_MASK(32); u8 s5p6440_pdma_peri[] = { static u8 s5p6440_pdma_peri[] = { DMACH_UART0_RX, DMACH_UART0_TX, DMACH_UART1_RX, Loading @@ -63,12 +63,12 @@ u8 s5p6440_pdma_peri[] = { DMACH_SPI1_RX, }; struct dma_pl330_platdata s5p6440_pdma_pdata = { static struct dma_pl330_platdata s5p6440_pdma_pdata = { .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), .peri_id = s5p6440_pdma_peri, }; u8 s5p6450_pdma_peri[] = { static u8 s5p6450_pdma_peri[] = { DMACH_UART0_RX, DMACH_UART0_TX, DMACH_UART1_RX, Loading Loading @@ -103,12 +103,12 @@ u8 s5p6450_pdma_peri[] = { DMACH_UART5_TX, }; struct dma_pl330_platdata s5p6450_pdma_pdata = { static struct dma_pl330_platdata s5p6450_pdma_pdata = { .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), .peri_id = s5p6450_pdma_peri, }; struct amba_device s5p64x0_device_pdma = { static struct amba_device s5p64x0_device_pdma = { .dev = { .init_name = "dma-pl330", .dma_mask = &dma_dmamask, Loading
arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h +0 −7 Original line number Diff line number Diff line Loading @@ -22,16 +22,9 @@ extern struct clksrc_clk clk_mout_epll; extern int s5p64x0_epll_enable(struct clk *clk, int enable); extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk); extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate); extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate); extern struct clk_ops s5p64x0_clkarm_ops; extern struct clksrc_clk clk_armclk; extern struct clksrc_clk clk_dout_mpll; extern struct clk *clkset_hclk_low_list[]; extern struct clksrc_sources clkset_hclk_low; extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); Loading