Commit fce6a8ec authored Apr 15, 2018 by Edgar E. Iglesias

target-microblaze: mmu: Make the TLBX MISS bit read-only



Make the TLBX MISS bit read-only.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

parent bd9e6608

target/microblaze/mmu.c

+4 −0

Original line number	Diff line number	Diff line
		@@ -273,6 +273,10 @@ void mmu_write(CPUMBState *env, uint32_t rn, uint32_t v)
		env->mmu.regs[rn] = v;
		}
		break;
		case MMU_R_TLBX:
		/* Bit 31 is read-only. */
		env->mmu.regs[rn] = deposit32(env->mmu.regs[rn], 0, 31, v);
		break;
		case MMU_R_TLBSX:
		{
		struct microblaze_mmu_lookup lu;