Commit fce1296f authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg: Add INDEX_op_extract2_{i32,i64} 



This will let backends implement the double-word shift operation.

Reviewed-by: default avatarDavid Hildenbrand <david@redhat.com>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 2089fcc9

tcg/README

+7 −0
Original line number Diff line number Diff line
@@ -343,6 +343,13 @@ at bit 8. This operation would be equivalent to 


(using an arithmetic right shift).



* extract2_i32/i64 dest, t1, t2, pos



For N = {32,64}, extract an N-bit quantity from the concatenation

of t2:t1, beginning at pos.  The tcg_gen_extract2_{i32,i64} expander

accepts 0 <= pos <= N as inputs.  The backend code generator will

not see either 0 or N as inputs for these opcodes.



* extrl_i64_i32 t0, t1



For 64-bit hosts only, extract the low 32-bits of input T1 and place it

tcg/aarch64/tcg-target.h

+2 −0
Original line number Diff line number Diff line
@@ -77,6 +77,7 @@ typedef enum { 
#define TCG_TARGET_HAS_deposit_i32      1

#define TCG_TARGET_HAS_extract_i32      1

#define TCG_TARGET_HAS_sextract_i32     1

#define TCG_TARGET_HAS_extract2_i32     0

#define TCG_TARGET_HAS_movcond_i32      1

#define TCG_TARGET_HAS_add2_i32         1

#define TCG_TARGET_HAS_sub2_i32         1
@@ -113,6 +114,7 @@ typedef enum { 
#define TCG_TARGET_HAS_deposit_i64      1

#define TCG_TARGET_HAS_extract_i64      1

#define TCG_TARGET_HAS_sextract_i64     1

#define TCG_TARGET_HAS_extract2_i64     0

#define TCG_TARGET_HAS_movcond_i64      1

#define TCG_TARGET_HAS_add2_i64         1

#define TCG_TARGET_HAS_sub2_i64         1

tcg/arm/tcg-target.h

+1 −0
Original line number Diff line number Diff line
@@ -116,6 +116,7 @@ extern bool use_idiv_instructions; 
#define TCG_TARGET_HAS_deposit_i32      use_armv7_instructions

#define TCG_TARGET_HAS_extract_i32      use_armv7_instructions

#define TCG_TARGET_HAS_sextract_i32     use_armv7_instructions

#define TCG_TARGET_HAS_extract2_i32     0

#define TCG_TARGET_HAS_movcond_i32      1

#define TCG_TARGET_HAS_mulu2_i32        1

#define TCG_TARGET_HAS_muls2_i32        1

tcg/i386/tcg-target.h

+2 −0
Original line number Diff line number Diff line
@@ -124,6 +124,7 @@ extern bool have_avx2; 
#define TCG_TARGET_HAS_deposit_i32      1

#define TCG_TARGET_HAS_extract_i32      1

#define TCG_TARGET_HAS_sextract_i32     1

#define TCG_TARGET_HAS_extract2_i32     0

#define TCG_TARGET_HAS_movcond_i32      1

#define TCG_TARGET_HAS_add2_i32         1

#define TCG_TARGET_HAS_sub2_i32         1
@@ -162,6 +163,7 @@ extern bool have_avx2; 
#define TCG_TARGET_HAS_deposit_i64      1

#define TCG_TARGET_HAS_extract_i64      1

#define TCG_TARGET_HAS_sextract_i64     0

#define TCG_TARGET_HAS_extract2_i64     0

#define TCG_TARGET_HAS_movcond_i64      1

#define TCG_TARGET_HAS_add2_i64         1

#define TCG_TARGET_HAS_sub2_i64         1

tcg/mips/tcg-target.h

+2 −0
Original line number Diff line number Diff line
@@ -162,6 +162,7 @@ extern bool use_mips32r2_instructions; 
#define TCG_TARGET_HAS_deposit_i32      use_mips32r2_instructions

#define TCG_TARGET_HAS_extract_i32      use_mips32r2_instructions

#define TCG_TARGET_HAS_sextract_i32     0

#define TCG_TARGET_HAS_extract2_i32     0

#define TCG_TARGET_HAS_ext8s_i32        use_mips32r2_instructions

#define TCG_TARGET_HAS_ext16s_i32       use_mips32r2_instructions

#define TCG_TARGET_HAS_rot_i32          use_mips32r2_instructions
@@ -177,6 +178,7 @@ extern bool use_mips32r2_instructions; 
#define TCG_TARGET_HAS_deposit_i64      use_mips32r2_instructions

#define TCG_TARGET_HAS_extract_i64      use_mips32r2_instructions

#define TCG_TARGET_HAS_sextract_i64     0

#define TCG_TARGET_HAS_extract2_i64     0

#define TCG_TARGET_HAS_ext8s_i64        use_mips32r2_instructions

#define TCG_TARGET_HAS_ext16s_i64       use_mips32r2_instructions

#define TCG_TARGET_HAS_rot_i64          use_mips32r2_instructions